LT3508
APPLICATIONS INFORMATION
PCB Layout
applicationsorinbatteryback-upsystemswhereabattery
or some other supply is diode OR-ed with the LT3508’s
ForproperoperationandminimumEMI,caremustbetaken
during printed circuit board layout. Figure 11 shows the
recommendedPCBlayoutwithtraceandvialocations.Note
that large, switched currents flow in the LT3508’s V and
SWpins,thecatchdiode(D1)andtheinputcapacitor(C ).
output. If the V pin is allowed to float and the SHDN pin
IN
is held high (either by a logic signal or because it is tied
to V ), then the LT3508’s internal circuitry will pull its
IN
IN
quiescent current through its SW pin. This is fine if your
system can tolerate a few mA in this state. If you ground
the SHDN pin, the SW pin current will drop to essentially
IN
The loop formed by these components should be as small
as possible. These components, along with the inductor
and output capacitor, should be placed on the same side
of the circuit board, and their connections should be made
on that layer. Place a local, unbroken ground plane below
these components. The SW and BOOST nodes should be
zero. However, if the V pin is grounded while the output
IN
is held high, then parasitic diodes inside the LT3508 can
pull large currents from the output through the SW pin
and the V pin. Figure 10 shows a circuit that will run
IN
only when the input voltage is present and that protects
as small as possible. Finally, keep the FB and V nodes
C
against a shorted or reversed input.
small so that the ground traces will shield them from the
SW and BOOST nodes. The Exposed Pad on the bottom of
the package must be soldered to ground so that the pad
acts as a heat sink. To keep thermal resistance low, extend
the ground plane as much as possible, and add thermal
viasunderandneartheLT3508toadditionalgroundplanes
within the circuit board and on the bottom side.
PARASITIC DIODE
D4
V
SW
IN
V
V
IN
OUT
LT3508
3508 F10
Figure 10. Diode D4 Prevents a Shorted Input from Discharging
a Backup Battery Tied to the Output
(11a) Example Layout for FE16 Package
(11b) Example Layout for QFN Package
Figure 11. A Good PCB Layout Ensures Proper Low EMI Operation
3508fb
18
Linear [ Linear ]
