LT1956/LT1956-5
W U U
U
APPLICATIO S I FOR ATIO
Peak-to-peak output ripple voltage is the sum of a triwave
(created by peak-to-peak ripple current (ILP-P) times ESR)
and a square wave (created by parasitic inductance (ESL)
and ripple current slew rate). Capacitive reactance is
assumed to be small compared to ESR or ESL.
ceramic capacitor. Although this reduction of ESR re-
moves a useful zero in the overall loop response, this zero
can be replaced by inserting a resistor (RC) in series with
the VC pin and the compensation capacitor CC. (See
Ceramic Capacitors in Applications Information.)
Peak Inductor Current and Fault Current
dI
dt
VRIPPLE = I
LP-P)(
ESR + ESL Σ
) (
(
)
To ensure that the inductor will not saturate, the peak in-
ductorcurrentshouldbecalculatedknowingthemaximum
load current. An appropriate inductor should then be cho-
sen. In addition, a decision should be made whether or not
the inductor must withstand continuous fault conditions.
where:
ESR = equivalent series resistance of the output
capacitor
ESL = equivalent series inductance of the output
capacitor
If maximum load current is 0.5A, for instance, a 0.5A
inductor may not survive a continuous 2A overload condi-
tion. Dead shorts will actually be more gentle on the
inductor because the LT1956 has frequency and current
limit foldback.
dI/dt = slew rate of inductor ripple current = VIN/L
Peak-to-peak ripple current (ILP-P) through the inductor
and into the output capacitor is typically chosen to be
between 20% and 40% of the maximum load current. It is
approximated by:
Peak inductor and switch current can be significantly
higher than output current, especially with smaller induc-
tors and lighter loads, so don’t omit this step. Powdered
V
V – V
IN OUT
(
=
OUT )(
)
ILP-P
Table 2
V
f L
IN)( )( )
(
VENDOR/
PART NO.
VALUE
H)
I
DCR
(Ohms)
HEIGHT
(mm)
DC(MAX)
(
µ
(Amps)
Example: with VIN = 12V, VOUT = 5V, L = 15µH, ESR =
0.080Ω and ESL = 10nH, output ripple voltage can be
approximated as follows:
Coiltronics
UP1B-100
10
22
22
33
15
1.9
1.2
2.0
1.7
1.5
0.111
0.254
0.062
0.092
0.175
5.0
5.0
6.0
6.0
5.0
UP1B-220
UP2B-220
5 12 − 5
( )(
)
ILP-P
=
= 0.389A
UP2B-330
12 15 •10–6 500 •10–6
( )
(
)(
)
UP1B-150
dI
Σ
12
Coilcraft
=
= 106 • 0.8
15 •10−6
D01813P-153HC
D01813P-103HC
D53316P-223
D53316P-333
LP025060B-682
Sumida
15
10
22
33
1.5
1.9
1.6
1.4
1.3
0.170
0.111
0.207
0.334
0.165
5.0
5.0
dt
VRIPPLE = 0.389 0.08 + 10 •10−9 106 0.8
(
)(
)
(
)
(
)(
)
5.1
= 0.031+ 0.008 = 39mVP-P
5.1
6.8
1.65
To reduce output ripple voltage further requires an in-
crease in the inductor value with the trade-off being a
physically larger inductor with the possibility of increased
component height and cost.
CDRH4D28-4R7
CDRH5D28-100
CDRH6D28-150
CDRH6D28-180
CDRH6D28-220
CDRH6D38-220
4.7
10
15
18
22
22
1.32
1.30
1.40
1.32
1.20
1.30
0.072
0.065
0.084
0.095
0.128
0.096
3.0
3.0
3.0
3.0
3.0
4.0
Ceramic Output Capacitor
An alternative way to further reduce output ripple voltage
is to reduce the ESR of the output capacitor by using a
1956f
10
Linear [ Linear ]
