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1654I 参数 Datasheet PDF下载

1654I图片预览
型号: 1654I
PDF下载: 下载PDF文件 查看货源
内容描述: 双通道14位轨至轨DAC,采用16引脚SSOP封装 [Dual 14-Bit Rail-to-Rail DAC in 16-Lead SSOP Package]
分类和应用:
文件页数/大小: 16 页 / 181 K
品牌: Linear [ Linear ]
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LTC1654  
W U U  
APPLICATIO S I FOR ATIO  
U
The offset, gain error and linearity of the LTC1654 are  
defined and tested in output ranges that avoid limiting.  
The low code kL used in these measurements is defined as  
the code which gives a nominal output of 32mV above  
ground; see Table 2.  
Rail-to-Rail Output Considerations  
Rail-to-rail DACs take full advantage of the supply range  
available to them, but cannot produce output voltages  
above VCC or below ground. See Figure 2a.  
If REFLO is tied to GND, the output for the lowest codes  
may limit at 0V, as shown in Figure 2b. Similarly, limiting  
can occur near full scale if the REFHI pin is tied to VCC, as  
shown in Figure 2c.  
POSITIVE  
V
REF  
= V  
CC  
FSE  
OUTPUT  
VOLTAGE  
INPUT CODE  
(c)  
V
REF  
= V  
CC  
OUTPUT  
VOLTAGE  
0
8192  
16383  
INPUT CODE  
(a)  
OUTPUT  
VOLTAGE  
0V  
NEGATIVE  
OFFSET  
INPUT CODE  
(b)  
1654 F02  
Figure 2. Effects of Rail-to-Rail Operation On a DAC Transfer Curve: (a) Overall Transfer Function, (b) Effect of Negative  
Offset for Codes Near Zero Scale, (c) Effect of Positive Full-Scale Error for Input Codes Near Full Scale When V = V  
REF  
CC  
Table 2. Low Code k  
L
V , V  
REFHI  
4.096 2.048  
1
128  
256  
512  
1/2 256  
Note: V  
= O  
REFLO  
1654fb  
11