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1446I 参数 Datasheet PDF下载

1446I图片预览
型号: 1446I
PDF下载: 下载PDF文件 查看货源
内容描述: 双通道12位轨至轨微DAC的采用SO - 8 [Dual 12-Bit Rail-to-Rail Micropower DACs in SO-8]
分类和应用:
文件页数/大小: 12 页 / 168 K
品牌: Linear [ Linear ]
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LTC1446/LTC1446L  
U U  
DEFI ITIO S  
Resolution (n)  
Nominal LSBs:  
Resolution is defined as the number of digital input bits,  
n. It defines the number of DAC output states (2n) that  
divide the full-scale range. The resolution does not imply  
linearity.  
LTC1446 LSB = 4.095V/4095 = 1mV  
LTC1446L LSB = 2.5V/4095 = 0.610mV  
Zero Scale Error (ZSE)  
The output voltage when the DAC is loaded with all zeros.  
Since this is a single supply part this value cannot be less  
than 0V.  
Full-Scale Voltage (VFS)  
This is the output of the DAC when all bits are set to one.  
Voltage Offset Error (VOS)  
Integral Nonlinearity (INL)  
The theoretical voltage at the output when the DAC is  
loaded with all zeros. The output amplifier can have a true  
negative offset, but because the part is operated from a  
single supply, the output cannot go below zero. If the  
offset is negative, the output will remain near 0V resulting  
in the transfer curve shown in Figure 1.  
End-point INL is the maximum deviation from a straight  
line passing through the end points of the DAC transfer  
curve. Because the part operates from a single supply and  
the output cannot go below 0, the linearity is measured  
between full scale and the code corresponding to the  
maximum offset specification. The INL error at a given  
input code is calculated as follows :  
OUTPUT  
VOLTAGE  
INL = [VOUT – VOS – (VFS – VOS)(Code/4095)]/LSB  
VOUT=theoutputvoltageoftheDACmeasuredatthegiven  
input code  
0V  
NEGATIVE  
OFFSET  
DAC CODE  
1446/46L F01  
Differential Nonlinearity (DNL)  
Figure 1. Effect of Negative Offset  
DNL is the difference between the measured change and  
the ideal 1LSB change between any two adjacent codes.  
The DNL error between any two codes is calculated as  
follows:  
The offset of the part is measured at the code that corre-  
sponds to the maximum offset specification:  
VOS = VOUT – [(Code)(VFS)/(2n – 1)]  
DNL = (VOUT – LSB)/LSB  
Least Significant Bit (LSB)  
VOUT = The measured voltage difference between two  
adjacent codes  
One LSB is the ideal voltage difference between two  
successive codes.  
LSB = (VFS – VOS)/(2n – 1) = (VFS – VOS)/4095  
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