LT1395/LT1396/LT1397
O U
W
U
PPLICATI
S I FOR ATIO
A
Feedback Resistor Selection
Slew Rate
Thesmall-signalbandwidthoftheLT1395/LT1396/LT1397
is set by the external feedback resistors and the internal
junction capacitors. As a result, the bandwidth is a func-
tion of the supply voltage, the value of the feedback
resistor, the closed-loop gain and the load resistor. The
LT1395/LT1396/LT1397 have been optimized for ±5V
supply operation and have a –3dB bandwidth of 400MHz
at a gain of 1 and 350MHz at a gain of 2. Please refer to
the resistor selection guide in the Typical AC Perfor-
mance table.
Unlike a traditional voltage feedback op amp, the slew rate
of a current feedback amplifier is not independent of the
amplifier gain configuration. In a current feedback ampli-
fier,boththeinputstageandtheoutputstagehaveslewrate
limitations.Intheinvertingmode,andforgainsof2ormore
inthenoninvertingmode,thesignalamplitudebetweenthe
input pins is small and the overall slew rate is that of the
outputstage.Forgainslessthan2inthenoninvertingmode,
the overall slew rate is limited by the input stage.
The input slew rate of the LT1395/LT1396/LT1397 is
approximately600V/µsandissetbyinternalcurrentsand
capacitances. The output slew rate is set by the value of
the feedback resistor and internal capacitance. At a gain
of 2 with 255Ω feedback and gain resistors and ±5V
supplies, theoutputslewrateistypically800V/µs. Larger
feedback resistors will reduce the slew rate as will lower
supply voltages.
Capacitance on the Inverting Input
Current feedback amplifiers require resistive feedback
from the output to the inverting input for stable operation.
Take care to minimize the stray capacitance between the
output and the inverting input. Capacitance on the invert-
ing input to ground will cause peaking in the frequency
response (and overshoot in the transient response).
Enable/ Disable
Capacitive Loads
The LT1395CS6 has a unique high impedance, zero
supply current mode which is controlled by the EN pin.
The LT1395CS6 is designed to operate with CMOS logic;
it draws virtually zero current when the EN pin is high. To
activate the amplifier, its EN pin is normally pulled to a
logiclow. However, supplycurrentwillvaryasthevoltage
between the V+ supply and EN is varied. As seen in Figure
1, +IS does vary with (V+ – VEN), particularly when the
voltage difference is less than 3V. For normal operation,
The LT1395/LT1396/LT1397 can drive many capacitive
loads directly when the proper value of feedback resistor
is used. The required value for the feedback resistor will
increaseasloadcapacitanceincreasesandasclosed-loop
gaindecreases. Alternatively, asmallresistor(5Ωto35Ω)
canbeputinserieswiththeoutputtoisolatethecapacitive
loadfromtheamplifieroutput. Thishastheadvantagethat
the amplifier bandwidth is only reduced when the capaci-
tive load is present. The disadvantage is that the gain is a
function of the load resistance. See the Typical Perfor-
mance Characteristics curves.
5.0
T
= 25°C
A
+
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= 5V
–
V
= 0V
Power Supplies
–
The LT1395/LT1396/LT1397 will operate from single or
split supplies from ± 2V (4V total) to ±6V (12V total). It
is not necessary to use equal value split supplies, how-
ever the offset voltage and inverting input bias current
will change. The offset voltage changes about 2.5mV per
volt of supply mismatch. The inverting bias current will
typicallychangeabout10µApervoltofsupplymismatch.
V
= –5V
0
2
3
+
4
5
6
7
1
V
– V (V)
EN
1395/6/7 F01
Figure 1. +IS vs (V+ – VEN
)
139567fc
10
Linear [ Linear ]
