LT1308A/LT1308B
U
W U U
APPLICATIONS INFORMATION
A SEPIC (Single-Ended Primary Inductance Converter)
schematic is shown in Figure 8. This converter topology
produces a regulated output over an input voltage range
that spans (i.e., can be higher or lower than) the output.
Recommended component placement for an SO-8 pack-
age SEPIC is shown in Figure 9.
LBI
LBO
GROUND PLANE
C1
+
V
IN
R1
1
2
3
4
5
6
7
14
C2
13
12
11
10
9
L1
4.7μF
CERAMIC
R2
L1A
CTX10-2
D1
SHUTDOWN
V
IN
3V TO
10V
LT1308A
LT1308B
V
SW
IN
+
MULTIPLE
VIAs
L1B
C1
47μF
R1
309k
LT1308B
V
OUT
8
5V
SHUTDOWN
SHDN
FB
GND
500mA
V
C
+
R2
100k
D1
+
C3
220μF
6.3V
47k
C2
GND
680pF
V
OUT
C1: AVX TAJC476M016
C2: TAIYO YUDEN EMK325BJ475(X5R)
C3: AVX TPSD227M006
D1: IR 10BQ015
L1: COILTRONICS CTX10-2
1308A/B F08
1308 F07
Figure 7. Recommended Component
Placement for TSSOP Boost Converter.
Placement is Similar to Figure 4.
Figure 8. SEPIC (Single-Ended Primary
Inductance Converter) Converts 3V to 10V
Input to a 5V/500mA Regulated Output
LBI
LBO
GROUND PLANE
C1
+
V
IN
R1
1
2
8
7
6
5
LT1308A
LT1308B
R2
SHUTDOWN
3
4
L1A
C2
L1B
MULTIPLE
VIAs
C3
+
GND
D1
V
OUT
1308 F09
Figure 9. Recommended Component Placement for SEPIC
1308abfa
10
Linear [ Linear ]
