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1206YD226MAT2A 参数 Datasheet PDF下载

1206YD226MAT2A图片预览
型号: 1206YD226MAT2A
PDF下载: 下载PDF文件 查看货源
内容描述: 38V , 10A DC / DC稳压器μModule高级输入和负载保护 [38V, 10A DC/DC μModule Regulator with Advanced Input and Load Protection]
分类和应用: 稳压器
文件页数/大小: 64 页 / 822 K
品牌: LINER [ LINEAR TECHNOLOGY ]
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LTM4641
ELECTRICAL CHARACTERISTICS
SYMBOL
I
OUT(PK)
I
VINH(IOUT_SHORT)
Control Section
V
FB
I
TRACK/SS
V
FCB
I
FCB
t
ON(MIN)
t
OFF(MIN)
V
OSNS(DM)
V
OSNS(CM)
R
IN(VOSNS
+
)
INTV
CC
, DRV
CC
, 1V
REF
V
INTVCC
∆V
INTVCC(LOAD)
V
INTVCC
V
INTVCC(LOWLINE)
DRV
CC(UVLO)
I
DRVCC
INTV
CC
Voltage at Low Line
DRV
CC
Undervoltage Lockout
DRV
CC
Current
Internal V
CC
Voltage
INTV
CC
Load Regulation
6V ≤ V
IN
≤ 38V, INTV
CC
Not Connected to DRV
CC
,
DRV
CC
= 5.3V
RUN = 0V, INTV
CC
Not Connected to DRV
CC
,
DRV
CC
= 5.3V and:
I
INTVCC
Varied from 0mA to –20mA
I
INTVCC
Varied from 0mA to –30mA
V
IN
= 4.5V, R
SET1A
= R
SET1B
= 0Ω (~0.6V
OUT
,
R
fSET
Value Recommended in Table 1)
DRV
CC
Rising
DRV
CC
Falling
INTV
CC
Not Connected to DRV
CC
, DRV
CC
= 5.3V,
R
SET1A
, R
SET1B
and R
SET2
Setting V
OUT
to:
1.8V
OUT
, R
fSET
= 2MΩ, 0A ≤ I
OUT
≤ 10A
6.0V
OUT
, R
fSET
= Open, 0A ≤ I
OUT
≤ 10A
(Use R
SET1A
= R
SET1B
≤ 8.2k)
I
1VREF
= 0mA
I
1VREF
= ±1mA
Ramping Differential V
OSNS+
– V
OSNS–
Voltage:
Up, PGOOD Goes Logic Low
High
Up, PGOOD Goes Logic High
Low
Down, PGOOD Goes Logic Low
High
Down, PGOOD Goes Logic High
Low
Differential V
OSNS+
– V
OSNS–
Voltage Returning
I
PGOOD
= 5mA
Delay Between Differential V
OSNS+
– V
OSNS–
Voltage Exiting PGOOD Valid Window to PGOOD
Going Logic Low (Note 4)
l
l
l
l
l
l
l
The
l
denotes the specifications which apply over the full internal
operating temperature range, otherwise specifications are at T
A
= 25°C (Note 2). V
IN
= V
INH
= V
INL
= 28V, per the typical application
shown in Figure 45, unless otherwise noted.
PARAMETER
Output Current Limit
CONDITIONS
5.1kΩ Pull-Up from PGOOD to 5V Source, I
OUT
Ramped Up Until V
OUT
Below PGOOD Lower
Threshold, PGOOD Pulls Logic Low
V
OUT
Electrically Shorted to GND
MIN
TYP
24
MAX
UNITS
A
Power Stage Input Current During
Output Short Circuit
Differential Feedback Voltage from
V
OSNS+
to V
OSNS–
TRACK/SS Pull-Up Current
FCB Threshold
FCB Pin Current
Minimum On-Time
Minimum Off-Time
Remote Sense Pin-Pair Differential
Mode Input Range
Remote Sense Pin-Pair Common
Mode Input Range
Input Resistance
45
mA
I
OUT
= 0A
V
TRACK/SS
= 0V
V
FCB
= 0.8V
(Note 4)
(Note 4)
Valid Differential V
OSNS+
-to- V
OSNS–
Range
(Use R
SET1A
= R
SET1B
≤ 8.2k)
Valid V
OSNS–
Common Mode Range
Valid V
OSNS+
Common Mode Range
(Use R
SET1A
= R
SET1B
≤ 8.2k)
V
OSNS+
to GND
l
591
–0.45
0.76
600
–1
0.8
0
43
220
609
mV
μA
0.84
±1
75
300
2.7
V
μA
ns
ns
V
V
V
Ω
V
l
l
l
0
–0.3
3
16400
5.3
16482
5.4
16318
5.1
–0.7
–1
4.2
3.9
3.2
4.3
4.05
3.35
±2
±3
%
%
V
4.2
3.5
V
V
11
20
0.985
0.980
1.000
1.000
18
27
1.015
1.020
mA
mA
V
V
V
1VREF(DC)
PGOOD Output
V
PGOOD(TH)
1V
REF
DC Voltage Regulation
Power Good Window, Logic State
Transition Thresholds
533
645
621
525
8
556
660
644
540
16
75
12
579
675
667
555
24
400
mV
mV
mV
mV
mV
mV
μs
V
PGOOD(HYST)
V
PGOOD(VOL)
t
PGOOD(DELAY)
Hysteresis
Logic-Low Output Voltage
PGOOD Logic-Low Blanking Time
4641f
5