LTC1064-3
TYPICAL APPLICATIO S
1
V
IN
2
NC
OUT C 14
POWER SOURCE
V
+
V
–
13
NC
V
IN
LTC1064-3
3
12
V
–
AGND
4
0.1µF 5
6
V
+
AGND
NC
f
CLK
75/150
V
OUT
NC
11
10
9
8
V
+
/V
–
10k
0.1µF
0.1µF
10k
0.1µF
7 INV A
RECOMMENDED OP AMPS:
LT1022, LT318, LT1056
Figure 1. Buffering the Filter Output. The Buffer Op Amp
Should Not Share the LTC1064-3 Power Lines
1
V
IN
2
3
V
+
= 15V
0.1µF
5k
+
NC
V
IN
LTC1064-3
12
AGND
V
–
V
+
AGND
NC
INV A
f
CLK
75/150
V
OUT
NC
11
10
9
8
V
OUT
0.1µF
5k
4
5
6
V /2
0.1µF
5k
7
Figure 3. Single Supply Operation. If Fast Power Up
or Down Transients are Expected, Use a 1N5817
Schottky Diode Between Pin 4 and Pin 5
V
IN
V
+
0.1µF
Figure 5. Adding an Output Buffer-Filter to Eliminate Any Clock
Feedthrough. Passband
±0.1dB
to 50kHz, –3dB at 94kHz
10643fa
8
U
1
V
IN
2
3
V
+
1N5817
0.1µF
4
5
6
V
OUT
NC
V
IN
OUT C
NC
14
13
V
–
1N5817
0.1µF
LTC1064-3
12
V
–
AGND
V
+
AGND
NC
INV A
f
CLK
75/150
V
OUT
NC
11
10
9
8
V
OUT
–
+
1064-3 F01
7
1064-3 F02
0.1µF
Figure 2. Using Schottky Diodes to Protect
the IC from Power Supply Reversal
OUT C
NC
14
13
V
IN
1
2
3
NC
V
IN
OUT C
NC
14
13
V
+
2.2k
T
2
L
LEVEL
RATIO
V
OUT
5k
1µF
LTC1064-3
12
AGND
V
–
V
+
AGND
NC
INV A
f
CLK
75/150
V
OUT
NC
11
10
9
8
f
CLK
0V TO 10V
V
+
5k
4
5
6
7
1064-3 F03
1064-3 F04
Figure 4. Level Shifting the Input T
2
L Clock
for Single Supply Operation
≥6V
1
2
3
4
5
6
7
NC
V
IN
OUT C
NC
14
13
V
–
0.1µF
200pF
10
9
8
V
+
/GND/V
–
4.99k
4.99k
10k
V
OUT
LTC1064-3
12
AGND
V
–
V
+
AGND
NC
INV A
f
CLK
75/150
V
OUT
NC
11
–
LT1056
50Ω
0.027µF
1064-3 F05
430pF
+
LINEAR_DIMENSIONS [ LINEAR DIMENSIONS SEMICONDUCTOR ]
