LT1158
OPERATION
(Refer to Functional Diagram)
goes low in PWM operation, and is maintained by the charge
pump when the top MOSFET is on DC. A regulated boost
driver at pin 1 employs a source-referenced 15V clamp
that prevents the bootstrap capacitor from overcharging
regardless of V
+
or output transients.
The LT1158 provides a current-sense comparator and fault
output circuit for protection of the top power MOSFET. The
comparator input pins 11 and 12 are normally connected
across a shunt in the source of the top power MOSFET
(or to a current-sensing MOSFET). When pin 11 is more
than 1.2V below V
+
and V12 – V11 exceeds the 110mV
offset,
FAULT
pin 5 begins to sink current. During a short
circuit, the feedback loop regulates V12 – V11 to 150mV,
thereby limiting the top MOSFET current.
APPLICATIONS INFORMATION
Power MOSFET Selection
Since the LT1158 inherently protects the top and bottom
MOSFETs from simultaneous conduction, there are no size
or matching constraints. Therefore selection can be made
based on the operating voltage and R
DS(ON)
requirements.
The MOSFET BV
DSS
should be at least 2 • V
SUPPLY
, and
should be increased to 3 • V
SUPPLY
in harsh environments
with frequent fault conditions. For the LT1158 maximum
operating supply of 30V, the MOSFET BV
DSS
should be
from 60V to 100V.
The MOSFET R
DS(ON)
is specified at T
J
= 25°C and is gener-
ally chosen based on the operating efficiency required as
long as the maximum MOSFET junction temperature is not
exceeded. The dissipation in each MOSFET is given by:
P =D
(
I
DS
)
(
1
+ ∂
)
R
DS
(
ON
)
2
and the available heat sinking has a thermal resistance of
20°C/W, the MOSFET junction temperature will be 125°C,
and ∂ = 0.007(125 – 25) = 0.7. This means that the required
R
DS(ON)
of the MOSFET will be 0.089Ω/1.7 = 0.0523Ω,
which can be satisfied by an IRFZ34.
Note that these calculations are for the continuous operating
condition; power MOSFETs can sustain far higher dissipa-
tions during transients. Additional R
DS(ON)
) constraints are
discussed under Starting High In-Rush Current Loads.
GATE DR
LT1158
GATE FB
R
G
R
G
R
G
: OPTIONAL 10Ω
where D is the duty cycle and ∂ is the increase in R
DS(ON)
at the anticipated MOSFET junction temperature. From this
equation the required R
DS(ON)
can be derived:
R
DS
(
ON
)
=
P
D
(
I
DS
)
(
1
+ ∂
)
2
1158 F01
Figure 1. Paralleling MOSFETs
Paralleling MOSFETs
MOSFETs can be paralleled. The MOSFETs will inherently
share the currents according to their R
DS(ON)
ratio. The
LT1158 top and bottom drivers can each drive four power
MOSFETs in parallel with only a small loss in switching
speeds (see Typical Performance Characteristics). Indi-
vidual gate resistors may be required to “decouple” each
MOSFET from its neighbors to prevent high frequency
oscillations—consult manufacturer’s recommendations.
For example, if the MOSFET loss is to be limited to 2W
when operating at 5A and a 90% duty cycle, the required
R
DS(ON)
would be 0.089Ω/(1 + ∂). (1 + ∂) is given for
each MOSFET in the form of a normalized R
DS(ON)
vs
temperature curve, but ∂ = 0.007/°C can be used as an
approximation for low voltage MOSFETs. Thus if T
A
= 85°C
1158fb
9
LINEAR_DIMENSIONS [ LINEAR DIMENSIONS SEMICONDUCTOR ]
