LND3842/43/44/45
Note 1: Parameter measured at trip point of latch with V
pin2=0
Note 2: Gain defined as A=∆V
pin1
/=∆V
pin3
: 0≤ V
pin3
≤0.8V.
Note 3: These parameters, although guaranteed, are not 100% tested in production.
PIN DESCRIPTION
No
1
2
3
4
5
6
7
8
FUNCTION
COMP
V
FB
I
SENSE
R
T
/C
T
GROUND
OUTPUT
V
CC
V
REF
DESCRIPTION
This pin is the Error Amplifier output and is made for loop compensation
This is the inverting input of the Error Amplifier. It is normally connected to
the switching power supply output through a resistor divider.
A voltage proportional to inductor current is connected to this input. The
PWM uses this information to terminate the output switch conduction.
The oscillator frequency and maximum Output duty cycle are programmed
by connecting resistor R
T
to V
ref
and capacitor C
T
to ground.
This pin is the combined control circuitry and power ground
This output directly drives the gate of a power MOSFET. Peak currents up to
1A are sourced and sinked by this pin.
This pin is the positive supply of the integrated circuit.
This is the reference output. It provides charging current for capacitor C
T
through resistor R
T
.
TYPICAL APPLICATIONS
2.5V
1mA
+
2
1
-
Figure 1. Error Amp Configuration
•
Linear Dimensions, Inc.
•
445 East Ohio Street, Chicago IL 60611 USA
•
tel 312.321.1810
•
fax 312.321.1830
•
•
LINEAR_DIMENSIONS [ LINEAR DIMENSIONS SEMICONDUCTOR ]
