LTC3890
applicaTions inForMaTion
Checking Transient Response
produce output voltage and ITH pin waveforms that will
give a sense of the overall loop stability without breaking
the feedback loop.
The regulator loop response can be checked by looking at
the load current transient response. Switching regulators
take several cycles to respond to a step in DC (resistive)
Placing a power MOSFET directly across the output ca-
pacitor and driving the gate with an appropriate signal
generator is a practical wayto producea realistic load step
condition. The initial output voltage step resulting from
the step change in output current may not be within the
bandwidth of the feedback loop, so this signal cannot be
used to determine phase margin. This is why it is better
to look at the ITH pin signal which is in the feedback loop
andisthefilteredandcompensatedcontrolloopresponse.
load current. When a load step occurs, V
shifts by an
OUT
amount equal to ∆I
(ESR), where ESR is the effective
LOAD
series resistance of C . ∆I
also begins to charge or
OUT
LOAD
discharge C
generating the feedback error signal that
OUT
forces the regulator to adapt to the current change and
return V to its steady-state value. During this recov-
OUT
ery time V
can be monitored for excessive overshoot
OUT
or ringing, which would indicate a stability problem.
OPTI-LOOP compensation allows the transient response
to be optimized over a wide range of output capacitance
and ESR values. The availability of the ITH pin not only
allows optimization of control loop behavior, but it also
providesaDCcoupledandACfilteredclosed-loopresponse
test point. The DC step, rise time and settling at this test
point truly reflects the closed-loop response. Assuming a
predominantly second order system, phase margin and/
or damping factor can be estimated using the percentage
of overshoot seen at this pin. The bandwidth can also
be estimated by examining the rise time at the pin. The
ITH external components shown in Figure 13 circuit will
provide an adequate starting point for most applications.
The gain of the loop will be increased by increasing R
C
and the bandwidth of the loop will be increased by de-
creasing C . If R is increased by the same factor that C
C
C
C
is decreased, the zero frequency will be kept the same,
thereby keeping the phase shift the same in the most
critical frequency range of the feedback loop. The output
voltage settling behavior is related to the stability of the
closed-loopsystemandwilldemonstratetheactualoverall
supply performance.
A second, more severe transient is caused by switching
in loads with large (>1µF) supply bypass capacitors. The
dischargedbypasscapacitorsareeffectivelyputinparallel
with C , causing a rapid drop in V . No regulator can
OUT
OUT
The ITH series R -C filter sets the dominant pole-zero
C
C
alter its delivery of current quickly enough to prevent this
sudden step change in output voltage if the load switch
resistance is low and it is driven quickly. If the ratio of
loop compensation. The values can be modified slightly
(from 0.5 to 2 times their suggested values) to optimize
transient response once the final PC layout is done and
the particular output capacitor type and value have been
determined. The output capacitors need to be selected
because the various types and values determine the loop
gain and phase. An output current pulse of 20% to 80%
of full-load current having a rise time of 1µs to 10µs will
C
LOAD
to C
is greater than 1:50, the switch rise time
OUT
should be controlled so that the load rise time is limited
to approximately 25 • C . Thus a 10µF capacitor would
LOAD
require a 250µs rise time, limiting the charging current
to about 200mA.
3890fb
26
Linear Systems [ Linear Systems ]
