LTC3890
operaTion (Refer to the Functional Diagram)
Light Load Current Operation (Burst Mode Operation,
Pulse-Skipping or Forced Continuous Mode)
(PLLIN/MODE Pin)
In forced continuous operation or clocked by an external
clock source to use the phase-locked loop (see Frequency
Selection and Phase-Locked Loop section), the induc-
tor current is allowed to reverse at light loads or under
large transient conditions. The peak inductor current is
determined by the voltage on the ITH pin, just as in normal
operation.Inthismode,theefficiencyatlightloadsislower
thaninBurstModeoperation.However,continuousopera-
tion has the advantage of lower output voltage ripple and
less interference to audio circuitry. In forced continuous
mode, the output ripple is independent of load current.
The LTC3890 can be enabled to enter high efficiency Burst
Modeoperation,constantfrequencypulse-skippingmode,
orforcedcontinuousconductionmodeatlowloadcurrents.
To select Burst Mode operation, tie the PLLIN/ MODE pin
to a DC voltage below 0.8V (e.g., SGND). To select forced
continuous operation, tie the PLLIN/MODE pin to INTV .
CC
To select pulse-skipping mode, tie the PLLIN/MODE pin to
aDCvoltagegreaterthan1.2VandlessthanINTV –1.3V.
CC
WhenthePLLIN/MODEpinisconnectedforpulse-skipping
mode, the LTC3890 operates in PWM pulse-skipping
mode at light loads. In this mode, constant frequency
operation is maintained down to approximately 1% of
designedmaximumoutputcurrent. Atverylightloads, the
current comparator, ICMP, may remain tripped for several
cycles and force the external top MOSFET to stay off for
the same number of cycles (i.e., skipping pulses). The
inductor current is not allowed to reverse (discontinuous
operation). This mode, like forced continuous operation,
exhibits low output ripple as well as low audio noise and
reduced RF interference as compared to Burst Mode
operation. It provides higher low current efficiency than
forced continuous mode, but not nearly as high as Burst
Mode operation.
WhenacontrollerisenabledforBurstModeoperation, the
minimum peak current in the inductor is set to approxi-
mately 25% of the maximum sense voltage even though
the voltage on the ITH pin indicates a lower value. If the
average inductor current is higher than the load current,
the error amplifier, EA, will decrease the voltage on the
ITH pin. When the ITH voltage drops below 0.425V, the
internal sleep signal goes high (enabling sleep mode)
and both external MOSFETs are turned off. The ITH pin is
then disconnected from the output of the EA and parked
at 0.450V.
In sleep mode, much of the internal circuitry is turned off,
reducing the quiescent current that the LTC3890 draws.
If one channel is shut down and the other channel is in
sleep mode, the LTC3890 draws only 50µA of quiescent
current. If both channels are in sleep mode, the LTC3890
draws only 60µA of quiescent current. In sleep mode,
the load current is supplied by the output capacitor. As
the output voltage decreases, the EA’s output begins to
rise. When the output voltage drops enough, the ITH pin
is reconnected to the output of the EA, the sleep signal
goes low, and the controller resumes normal operation
by turning on the top external MOSFET on the next cycle
of the internal oscillator.
Frequency Selection and Phase-Locked Loop
(FREQ and PLLIN/MODE Pins)
Theselectionofswitchingfrequencyisatrade-offbetween
efficiency and component size. Low frequency opera-
tion increases efficiency by reducing MOSFET switching
losses, but requires larger inductance and/or capacitance
to maintain low output ripple voltage.
The switching frequency of the LTC3890’s controllers can
be selected using the FREQ pin.
WhenacontrollerisenabledforBurstModeoperation, the
inductorcurrentisnotallowedtoreverse. Thereversecur-
rentcomparator,IR,turnsoffthebottomexternalMOSFET
just before the inductor current reaches zero, preventing
it from reversing and going negative. Thus, the controller
operates in discontinuous operation.
If the PLLIN/MODE pin is not being driven by an external
clock source, the FREQ pin can be tied to SGND, tied to
orprogrammedthroughanexternalresistor. Tying
INTV
CC
FREQ to SGND selects 350kHz while tying FREQ to INTV
CC
selects535kHz.PlacingaresistorbetweenFREQandSGND
allows the frequency to be programmed between 50kHz
and 900kHz, as shown in Figure 10.
3890fb
12
Linear Systems [ Linear Systems ]
