LTC3108-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are for TA = 25°C (Note 2). VAUX = 5V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
l
l
Output Voltage
VS1 = VS2 = GND
2.45
2.94
3.626
4.41
2.50
3.00
3.70
4.50
2.55
3.06
3.774
4.59
V
V
V
V
VS1 = VAUX, VS2 = GND
VS1 = GND, VS2 = VAUX
VS1 = VS2 = VAUX
V
Quiescent Current
V
= 3.7V, V = 0V
OUT2_EN
0.2
6
μA
μA
V
OUT
OUT
VAUX Quiescent Current
LDO Output Voltage
LDO Load Regulation
LDO Line Regulation
LDO Dropout Voltage
LDO Current Limit
No Load, All Outputs Charged
0.5mA Load
9
2.266
1
l
2.134
2.2
0.5
0.05
100
11
For 0mA to 2mA Load
For VAUX from 2.5V to 5V
%
0.2
%
l
l
l
l
l
I
= 2mA
200
mV
mA
mA
mA
V
VLDO
VLDO = 0V
= 0V
4
V
Current Limit
V
OUT
2.8
2.8
5
4.5
4.5
5.25
0.1
0.1
0.85
0.01
–7.5
–9
7
7
OUT
VSTORE Current Limit
VAUX Clamp Voltage
VSTORE Leakage Current
VSTORE = 0V
Current into VAUX = 5mA
VSTORE = 5V
5.55
0.3
μA
μA
V
V
Leakage Current
V
OUT2
= 0V, V
= 0V
OUT2
OUT2_EN
l
VS1, VS2 Threshold Voltage
VS1, VS2 Input Current
PGD Threshold (Rising)
PGD Threshold (Falling)
0.4
1.2
0.1
VS1 = VS2 = 5V
μA
%
Measured Relative to the V
Measured Relative to the V
Sink Current = 100μA
Source Current = 0
Voltage
Voltage
OUT
%
OUT
PGD V
PGD V
0.15
2.2
1
0.3
2.3
V
OL
OH
2.1
0.4
V
PGD Pull-Up Resistance
MΩ
V
l
V
V
V
V
V
V
V
Threshold Voltage
V
Rising
1
1.3
OUT2_EN
OUT2_EN
OUT2_EN
Pull-Down Resistance
5
MΩ
μs
μs
A
Turn-On Time
5
OUT2
OUT2
OUT2
OUT2
OUT2
Turn-Off Time
(Note 3)
= 3.7V
0.15
0.3
350
1.3
0.5
l
Current Limit
V
OUT
0.15
0.45
Current Limit Response Time
P-Channel MOSFET On-Resistance
(Note 3)
= 3.7V (Note 3)
ns
Ω
V
OUT
N-Channel MOSFET On-Resistance
C2 = 5V (Note 3)
Ω
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3108-1 is tested under pulsed load conditions such that
environmental factors. The junction temperature (T ) is calculated from
J
the ambient temperature (T ) and power dissipation (P ) according to
A
D
the formula: T = T + (P • θ °C/W), where θ is the package thermal
J
A
D
JA
JA
impedance.
Note 3: Specification is guaranteed by design and not 100% tested in
production.
T ≈ T . The LTC3108-1E is guaranteed to meet specifications from
J
A
Note 4: Failure to solder the exposed backside of the package to the PC
board ground plane will result in a thermal resistance much higher than
43°C/W.
0°C to 85°C junction temperature. Specifications over the –40°C to
125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC3108-1I is guaranteed over the full –40°C to 125°C operating junction
temperature range. Note that the maximum ambient temperature
is determined by specific operating conditions in conjunction with
board layout, the rated thermal package thermal resistance and other
Note 5: The absolute maximum rating is a DC rating. Under certain
conditions in the applications shown, the peak AC voltage on the C2 pin
may exceed 8V. This behavior is normal and acceptable because the
current into the pin is limited by the impedance of the coupling capacitor.
31081fa
3
Linear Systems [ Linear Systems ]
