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LTC2908IDDB-A1 参数 Datasheet PDF下载

LTC2908IDDB-A1图片预览
型号: LTC2908IDDB-A1
PDF下载: 下载PDF文件 查看货源
内容描述: 精准六电源监视器 [Precision Six Supply Monitor]
分类和应用: 监视器光电二极管
文件页数/大小: 16 页 / 166 K
品牌: Linear Systems [ Linear Systems ]
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LTC2908  
W U U  
APPLICATIO S I FOR ATIO  
U
RST Output Characteristics  
The rise time on the RST pin is limited by a weak internal  
pull-up current source to VCC. The following formula esti-  
mates the output rise time (10% to 90%) at the RST pin:  
The DC characteristics of the RST pull-up and pull-down  
strength are shown in the Typical Performance Character-  
istics section. The RST output has a weak internal pull-up  
to VCC = Max(V1, V2) and a strong pull-down to ground.  
tRISE 2.2 • RPU • CLOAD  
where RPU is the on-resistance of the pull-up transistor.  
Notice that this pull-up transistor is modeled as a 6µA  
current source in the Block Diagram as a typical  
representation.  
The weak pull-up and strong pull-down arrangement  
allowsthispintohaveopen-drainbehaviorwhilepossess-  
ing several other beneficial characteristics.  
The weak pull-up eliminates the need for external pull-up  
resistorswhentherisetimeonthesepinsisnotcritical.On  
the other hand, the open-drain RST configuration allows  
for wired-OR connections and can be useful when more  
than one signal needs to pull down on the RST line.  
The on-resistance as a function of the VCC = Max(V1, V2)  
voltage (for VCC > 1V) at room temperature is estimated as  
follows:  
6 105  
RPU  
=
MAX V1,V2 – 1V  
(
)
As noted in the discussion of power-up and power-down,  
the circuits that drive RST are powered by VCC. During  
fault condition, VCC of at least 0.5V guarantees a maxi-  
mum VOL = 0.15V at RST.  
At VCC = 3.3V, RPU is about 260k. Using 150pF for load  
capacitance, the rise time is 86µs. A smaller external pull-  
upresistormaybeusediftheoutputneedstopullupfaster  
and/or to a higher voltage. For example, the rise time  
reduces to 3.3µs for a 150pF load capacitance when using  
a 10k pull-up resistor.  
Output Rise and Fall Time Estimation  
The following formula estimates the output fall time (90%  
to 10%) for a particular external load capacitance (CLOAD):  
tFALL 2.2 • RPD • CLOAD  
where RPD is the on-resistance of the internal pull-down  
transistor estimated to be typically 40at room tempera-  
ture (25°C) and CLOAD is the external load capacitance on  
the pin. Assuming a 150pF load capacitance, the fall time  
is about 13ns.  
sn2908 2908fs  
11