LTC2872
pin FuncTions
DXEN1(Pin10):Drivers#±Enable.Alogiclowdisablesthe
RS232 and RS485 drivers in transceiver #±, leaving their
outputs in a Hi-Z state. A logic high enables the RS232 or
RS485 drivers in transceiver #±, depending on the state
of the Interface Select Input 485/232_±.
H/F (Pin 15): RS485 Half-duplex Select Input for Trans-
ceivers #± and #2. A logic low is used for full duplex
operation where pins A and B are the receiver inputs and
pins Y and Z are the driver outputs. A logic high is used
for half duplex operation where pins Y and Z are both the
receiver inputs and driver outputs and pins A and B do
not serve as the receiver inputs. The impedance on A and
B and state of differential termination between A and B is
independent of the state of H/F. The H/F pin has no effect
on RS232 operation.
DXEN2(Pin22):Drivers#2Enable.Alogiclowdisablesthe
RS232 and RS485 drivers in transceiver #2, leaving their
outputs in a Hi-Z state. A logic high enables the RS232 or
RS485 drivers in transceiver #2, depending on the state
of the Interface Select Input 485/232_2.
FEN(Pin16):FastEnable.AlogichighenablesFastEnable
Mode. InfastenablemodetheintegratedDC/DCconverter
is active independent of the state of driver, receiver, and
termination enable pins allowing faster circuit enable
times than are otherwise possible. A logic low disables
Fast Enable Mode leaving the state of the DC/DC converter
dependent on the state of driver, receiver, and termina-
tion enable control inputs. The DC/DC converter powers
down only when FEN is low and all drivers, receivers, and
terminators are disabled (refer to Table ±).
TE485_1 (Pin 11): RS485 Termination Enable for Trans-
ceiver #±. A logic high enables a ±20Ω resistor between
pins A± and B±. If DZ± is also high, a ±20Ω resistor is
enabled between pins Y± and Z±. A logic low on TE485_±
openstheresistors,leavingA±/B±andY±/Z±unterminated,
independent of DZ±. The differential termination resistors
are never enabled in RS232 mode.
TE485_2 (Pin 12): RS485 Termination Enable for Trans-
ceiver #2. A logic high enables a ±20Ω resistor between
pins A2 and B2. If DZ2 is also high, a ±20Ω resistor is
enabled between pins Y2 and Z2. A logic low on TE485_2
openstheresistors,leavingA2/B2andY2/Z2unterminated,
independent of DZ2. The differential termination resistors
are never enabled in RS232 mode.
LB (Pin 36): Loopback Enable for Transceivers #± and #2.
A logic high enables Logic Loopback diagnostic mode,
internallyroutingthedriverinputlogiclevelstothereceiver
output pins within the same transceiver. This applies to
bothRS232channelsaswellastheRS485driver/receiver.
The targeted receiver must be enabled for the loopback
signal to be available on its output. A logic low disables
loopbackmode.Inloopbackmode,signalsarenotinverted
from driver inputs to receiver outputs.
2872f
9
Linear Systems [ Linear Systems ]
