LTC2379-18
APPLICATIONS INFORMATION
OVERVIEW
TRANSFER FUNCTION
The LTC2379-18 is a low noise, low power, high speed
18-bit successive approximation register (SAR) ADC.
Operating from a single 2.5V supply, the LTC2379-18
The LTC2379-18 digitizes the full-scale voltage of 2 × REF
18
into 2 levels, resulting in an LSꢀ size of 38μV with
REF = 5V. The ideal transfer function is shown in Figure 2.
The output data is in 2’s complement format.
supports a large and flexible V fully differential input
REF
range with V ranging from 2.5V to 5.1V, making it ideal
REF
for high performance applications which require a wide
dynamicrange.TheLTC2379-18achieves 2LSꢀꢁILmax,
no missing codes at 18 bits and 101.2dꢀ SIR.
011...111
BIPOLAR
011...110
ZERO
000...001
000...000
111...111
111...110
Fast 1.6Msps throughput with no cycle latency makes
the LTC2379-18 ideally suited for a wide variety of high
speed applications. An internal oscillator sets the con-
version time, easing external timing considerations. The
LTC2379-18 dissipates only 18mW at 1.6Msps, while an
auto power-down feature is provided to further reduce
power dissipation during inactive periods.
100...001
FSR = +FS – –FS
1LSB = FSR/262144
100...000
–1 0V
LSB
INPUT VOLTAGE (V)
1
–FSR/2
FSR/2 – 1LSB
LSB
237918 F02
The LTC2379-18 features a unique digital gain compres-
sion(DGC)function,whicheliminatesthedriveramplifier’s
negative supply while preserving the full resolution of the
ADC. When enabled, the ADC performs a digital scaling
Figure 2. ꢀTC2379-18 Transfer Function
ANAꢀOG INPUT
function that maps zero-scale code from 0V to 0.1 • V
The analog inputs of the LTC2379-18 are fully differential
in order to maximize the signal swing that can be digitized.
Theanaloginputscanbemodeledbytheequivalentcircuit
shown in Figure 3. The diodes at the input provide ESD
protection. ꢁn the acquisition phase, each input sees ap-
REF
and full-scale code from V
to 0.9 • V . For a typical
REF
REF
reference voltage of 5V, the full-scale input range is now
0.5V to 4.5V, which provides adequate headroom for
powering the driving amplifier from a single 5.5V supply.
proximately 45pF (C ) from the sampling CDAC in series
ꢁI
with 40ꢂ (R ) from the on-resistance of the sampling
OI
CONVERTER OPERATION
switch. Any unwanted signal that is common to both
inputs will be reduced by the common mode rejection of
the ADC. The inputs draw a current spike while charging
The LTC2379-18 operates in two phases. During the ac-
quisition phase, the charge redistribution capacitor D/A
+
–
the C capacitors during acquisition. During conversion,
the analog inputs draw only a small leakage current.
converter (CDAC) is connected to the ꢁI and ꢁI pins to
sample the differential analog input voltage. A rising edge
ontheCIVpininitiatesaconversion.Duringtheconversion
phase, the 18-bit CDAC is sequenced through a succes-
sive approximation algorithm, effectively comparing the
sampled input with binary-weighted fractions of the refer-
ꢁI
REF
C
45pF
ꢁI
R
40Ω
OI
+
ꢁI
ꢁI
ence voltage (e.g. V /2, V /4 … V /262144) using
REF
REF
REF
ꢀꢁAS
VOLTAGE
the differential comparator. At the end of conversion, the
CDAC output approximates the sampled analog input. The
ADC control logic then prepares the 18-bit digital output
code for serial transfer.
REF
C
45pF
ꢁI
R
40Ω
OI
–
237918 F03
Figure 3. The Equivalent Circuit for the
Differential Analog Input of the ꢀTC2379-18
237918fa
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Linear Systems [ Linear Systems ]
