LTC1967
ELECTRICAL CHARACTERISTICS
Note 13:
The common mode rejection ratios of the LTC1967 are measured
with DC inputs from 50mV to 350mV. The input CMRR is defined as the
change in V
IOS
measured between input levels of 0V to 350mV and input
levels of V
+
– 350mV to V
+
divided by V
+
– 350mV. The output CMRR is
defined as the change in V
OOS
measured with OUT RTN = 0V and OUT RTN
= V
+
– 350mV divided by V
+
– 350mV.
Note 14:
The LTC1967 input and output voltage swings are limited by
internal clipping. However, its
∆Σ
topology is relatively tolerant of
momentary internal clipping.
Note 15:
The LTC1967 exploits oversampling and noise shaping to reduce
the quantization noise of internal 1-bit analog-to-digital conversions. At
higher input frequencies, increasingly large portions of this noise are
aliased down to DC. Because the noise is shifted in frequency, it becomes
a low frequency rumble and is only filtered at the expense of increasingly
long settling times. The LTC1967 is inherently wideband, but the output
accuracy is degraded by this aliased noise.
TYPICAL PERFOR A CE CHARACTERISTICS
Gain and Offset
vs Input Common Mode Voltage
0.3
0.2
0.1
GAIN ERROR (%)
50mV
≤
V
IN(PEAK)
≤
350mV
GAIN ERROR
V
IOS
GAIN ERROR (%)
0
–0.1
–0.2
–0.3
–0.4
–0.5
–0.6
–0.7
–1.0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
INPUT COMMON MODE VOLTAGE (V)
1967 G01
Gain and Offsets vs Temperature
0.05
0.04
0.03
50mV
≤
V
IN(PEAK)
≤
350mV
0.5
0.4
0.3
GAIN ERROR (%)
GAIN ERROR (%)
0.02
0.01
0
–0.01
–0.02
–0.03
–0.04
–0.05
–40
–15
GAIN ERROR
35
10
TEMPERATURE (°C)
4
U W
Gain and Offset
vs Output Common Mode Voltage
1.0
0.8
0.6
OFFSET VOLTAGE (mV)
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
V
IOS
V
OOS
50mV
≤
V
IN(PEAK)
≤
350mV
GAIN ERROR
1.0
0.8
0.6
OFFSET VOLTAGE (mV)
0.4
0.2
0
V
OOS
–0.2
–0.4
–0.6
–0.8
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT COMMON MODE VOLTAGE (V)
1967 G02
Gain and Offset vs Supply Voltage
0.5
0.4
0.3
OFFSET VOLTAGE (mV)
50mV
≤
V
IN(PEAK)
≤
350mV
1.0
0.8
0.6
OFFSET VOLTAGE (mV)
V
OOS
0.2
0.1
0
–0.1
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
4.5
4.8
GAIN ERROR
V
OOS
V
IOS
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
V
IOS
–0.2
–0.3
–0.4
60
85
1967 G03
–0.5
5.7
5.4
5.1
SUPPLY VOLTAGE (V)
–1.0
6.0
1967 G04
1967f
LINEAR [ LINEAR INTEGRATED SYSTEMS ]
