LTC1857/LTC1858/LTC1859
PI FU CTIO S
DGND (Pin 24):
Digital Ground.
SDI (Pin 25):
Serial Data Input.
SCK (Pin 26):
Serial Data Clock.
RD (Pin 27):
Read Input. This active low signal enables the
digital output pin SDO.
CONVST (Pin 28):
Conversion Start. This active high
signal starts a conversion on its rising edge.
FU CTIO AL BLOCK DIAGRA
CH0
CH1
•
•
•
INPUT MUX
AND
RANGE
SELECT
CH7
COM
MUXOUT
–
AGND1
MUXOUT
+
ADC
+
TEST CIRCUITS
Load Circuits for Access Timing
5V
1k
DN
1k
25pF
DN
25pF
DN
1k
25pF
DN
25pF
(A) Hi-Z TO VOH AND VOL TO VOH
(B) Hi-Z TO VOL AND VOH TO VOL
1859 TC01
8
W
U
U
U
U
U
AV
DD
DV
DD
MUX ADDRESS AND RANGE
CONTROL
LOGIC
INTERNAL
CLOCK
CONVST
SDI
BUSY
SCK
+
12-/14-/16-BIT
SAMPLING ADC
DATA OUT
SERIAL I/O
RD
OV
DD
SDO
4.096V
2.5V
REFERENCE
1.6384X
–
8k
ADC
–
V
REF
REFCOMP
1859 BD
AGND2 AGND3 DGND
Load Circuits for Output Float Delay
5V
1k
(A) VOH TO Hi-Z
(B) VOL TO Hi-Z
1859 TC02
185789f
LINEAR [ LINEAR INTEGRATED SYSTEMS ]
