LT3507
OPERATION
Each switcher contains an extra, independent oscillator to
perform frequency foldback during overload conditions.
Thisslaveoscillatorisnormallysynchronizedtothemaster
The LT3507 contains three independent, constant fre-
quency, current mode, switching regulators with internal
power switches plus a low dropout linear regulator. The
three regulators share common circuitry including input
source, voltage reference and oscillator, but are otherwise
independent. Operation can be best understood by refer-
ring to the Block Diagram (Figure 1).
oscillator. AcomparatorsenseswhenV islessthan50%
FB
of its regulated value and switches the regulator from the
masteroscillatortoaslowerslaveoscillator.V islessthan
FB
50% of its regulated value during start-up, short-circuit
and overload conditions. Frequency foldback helps limit
switch current under these conditions.
If the RUN pins are tied to ground, the LT3507 is shut
down and draws <1μA from the input source tied to V
.
IN1
The TRK/SS pins override the 0.8V reference for the FB
pins when the TRK/SS pins are below 0.8V. This allows
eithercoincidentorratiometricsupplytrackingonstart-up
as well as a soft-start capability.
IfanyoftheRUNpinsaredrivenabove1V, theinternalbias
circuitsturnon, includingtheinternalregulator, reference,
and master oscillator. Each switching regulator will only
begin to operate when its corresponding RUN pin reaches
>1.25V.Themasteroscillatorgeneratesthreeclocksignals,
with the signal for Channel 1 out of phase by 180°.
The switch drivers operate either from V or from the
IN
BOOST pin. An external capacitor and diode are used to
generate a voltage at the BOOST pin that is higher than the
input supply. This allows the driver to saturate the internal
bipolar NPN power switch for efficient operation.
The three switchers are current mode regulators. Instead
of directly modulating the duty cycle of the power switch,
the feedback loop controls the peak current in the switch
duringeachcycle.Comparedtovoltagemodecontrol,cur-
rent mode control improves loop dynamics and provides
cycle-by-cycle current limit.
TheBIASpinallowstheinternalcircuitrytodrawitscurrent
from a lower voltage supply than the input, also reducing
power dissipation and increasing efficiency. If the voltage
on the BIAS pin falls below 3V, then its quiescent current
TheBlockDiagramshowsonlyoneofthethreestep-down
switching regulators. A pulse from the slave oscillator
sets the RS flip-flop and turns on the internal NPN bipo-
lar power switch. Current in the switch and the external
inductor begins to increase. When this current exceeds a
will flow from V .
IN
A power good comparator trips when the FB pin is at
90% of its regulated value. The PGOOD output is an
open-collector transistor that is off when the output is in
regulation, allowinganexternalresistortopullthePGOOD
pin high. Power good is valid when the LT3507 is enabled
level determined by the voltage at V , current comparator
C
C1 resets the flip-flop, turning off the switch. The current
in the inductor flows through the external Schottky diode
and begins to decrease. The cycle begins again at the next
pulse from the oscillator. In this way, the voltage on the
and V > 3.5V.
IN
TheLDOregulatorusesanexternalNPNpasstransistorto
form a linear regulator. The loop is internally compensated
to be stable with a load capacitance of 2.2μF or greater.
V pin controls the current through the inductor to the
C
output. The internal error amplifier regulates the output
voltage by continually adjusting the V pin voltage. The
C
The LDO is disabled when all three of the RUN pins are
low.
threshold for switching on the V pin is >1V and an active
C
clamp of 1.8V limits the output current.
The overvoltage and undervoltage detection shuts down
the LT3507 if the input voltage goes above or below re-
sistor programmable thresholds. The hysteresis of these
detectors is also resistor programmable.
3507fa
9
Linear Systems [ Linear Systems ]
