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LT1769CFE 参数 Datasheet PDF下载

LT1769CFE图片预览
型号: LT1769CFE
PDF下载: 下载PDF文件 查看货源
内容描述: [Constant-Current/ Constant-Voltage 2A Battery Charger with Input Current Limiting]
分类和应用: 电池光电二极管
文件页数/大小: 16 页 / 219 K
品牌: Linear Systems [ Linear Systems ]
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LT1769  
U
U
U
(GN/FE Pin Numbers)  
PIN FUNCTIONS  
GND (Pins 1 to 3, 7, 8, 14, 15, 22, 26 to 28/Pins 4, 5, 14,  
20): Ground Pins. Must be connected to expanded PC  
lands for proper heat sinking. See Applications Informa-  
tion section for details.  
this function is not used, the resistor and capacitor on  
COMP1 pin, shown on the Figure 1 circuit, are not needed.  
SENSE (Pin 13/Pin 10): Current Amplifier CA1 Input.  
Sensing can be at either terminal of the battery.  
SW (Pin 4/Pin 1): Switch Output. The Schottky catch  
diode must be placed with very short lead length in close  
proximity to SW pin and GND.  
SPIN (Pin 16/Pin 11): This pin is for the current amplifier  
CA1 bias. It must be connected to RS1 as shown in the 2A  
Lithium Battery Charger (Figure 1).  
BOOST (Pin 5/Pin 2): This pin is used to bootstrap and  
drive the switch power NPN transistor to a low on-voltage  
forlowpowerdissipation. InFigure1, VBOOST =VCC +VBAT  
when switch is on. For lowest IC power dissipation,  
connect boost diode D1 to a 3V to 6V at 30mA voltage  
source (see Figure 10).  
BAT (Pin 17/Pin 12): Current Amplifier CA1 Input.  
COMP2 (Pin 18): This is also a compensation node for  
amplifier CL1. Voltage on this pin rises to 2.8V at input  
adapter current limit and/or at constant-voltage charging.  
UVOUT(Pin19/Pin13):Thisisanopen-collectoroutputfor  
undervoltage lockout status. It stays low in undervoltage  
state. Withanexternalpull-upresistor, itgoeshighatvalid  
VCC. Note that the base drive of the open-collector NPN  
comes from CLN pin. UVOUT stays low only when CLN is  
higherthan2V.Pull-upcurrentshouldbekeptunder100µA.  
UV (Pin 6/Pin 3): Undervoltage Lockout Input. The rising  
threshold is at 6.7V with a hysteresis of 0.5V. Switching  
stops in undervoltage lockout. When the input supply  
(normallythewalladapteroutput)totheICisremoved,the  
UV pin must be pulled down to below 0.7V (a 5k resistor  
from adapter output to GND is required) otherwise the  
reverse battery current drained by the IC will be approxi-  
mately 200µA instead of 3µA. Do not leave the UV pin  
floating. When connected to VIN with no resistor divider,  
the built-in 6.7V undervoltage lockout will be effective.  
VC (Pin 20/Pin 15): This is the inner loop control signal for  
the current mode PWM. Switching starts at 0.7V. In  
normal operation, a higher VC corresponds to higher  
charge current. A capacitor of at least 0.33µF to GND  
filters out noise and controls the rate of soft start. To stop  
switching, pull this pin low. Typical output current is 30µA.  
OVP (Pin 9/Pin 6): This is the input to amplifier VA with a  
threshold of 2.465V. Typical bias current is about 3nA out  
ofthispin. Forcharginglithium-ionbatteries, VAmonitors  
the battery voltage and reduces charging when battery  
voltage reaches the preset value. If it is not used, the OVP  
pin should be grounded.  
PROG (Pin 21/Pin 16): This pin is for programming the  
chargecurrentandforsystemloopcompensation. During  
normal operation, VPROG stays close to 2.465V. If it is  
shorted to GND switching will stop. When a microproces-  
sor controlled DAC is used to program charge current, it  
must be capable of sinking current at a compliance up to  
2.465V.  
CLP (Pin 10/Pin 8): This is the positive input to the input  
current limit amplifier CL1. The threshold is set at 100mV.  
Whenusedtolimitsupplycurrent,afilterisneededtofilter  
out the 200kHz switching noise.  
VCC1, VCC2, VCC3 (Pins 23 to 25/Pins 17 to 19): Input  
Supply. For good bypass, a low ESR capacitor of 15µF or  
higher is required, with the lead length kept to a minimum.  
VCC should be between 8V and 28V and at least 3V higher  
than VBAT. Undervoltage lockout starts and switching  
stops when VCC goes below 7V typical. Note that there is  
an internal parasitic diode from SW pin to VCC pin. Do not  
force VCC below SW by more than 0.7V with battery  
present. All three VCC pins should be shorted together  
close to the pins.  
CLN (Pin 11/Pin 7): This is the negative input to the input  
current limit amplifier CL1.  
COMP1 (Pin 12/Pin 9): This is the compensation node for  
the input current limit amplifier CL1. At input adapter  
current limit, this node rises to 1V. By forcing COMP1 low  
with an external transistor, amplifier CL1 will be defeated  
(no adapter current limit). COMP1 can source 200µA. If  
1769fa  
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