LT1160/LT1162
U
U
U
PIN FUNCTIONS
LT1160
LT1162
SV+(Pin1):MainSignalSupply.Mustbecloselydecoupled
SV+ (Pins 1, 7): Main Signal Supply. Must be closely
to the signal ground Pin 5.
decoupled to ground Pins 5 and 11.
INTOP(Pin2):TopDriverInput.Pin2isdisabledwhenPin
3 is high. A 3k input resistor followed by a 5V internal
clamp prevents saturation of the input transistors.
IN TOP (Pins 2, 8): Top Driver Input. The Input Top is
disabledwhentheInputBottomishigh. A3kinputresistor
followed by a 5V internal clamp prevents saturation of the
input transistors.
IN BOTTOM (Pin 3): Bottom Driver Input. Pin 3 is disabled
when Pin 2 is high. A 3k input resistor followed by a 5V
internalclamppreventssaturationoftheinputtransistors.
IN BOTTOM (Pins 3, 9): Bottom Driver Input. The Input
Bottom is disabled when the Input Top is high. A 3k input
resistor followed by a 5V internal clamp prevents satura-
tion of the input transistors.
UVOUT(Pin4):UndervoltageOutput. OpencollectorNPN
output which turns on when V+ drops below the
undervoltage threshold.
UVOUT(Pins4,10):UndervoltageOutput.Opencollector
NPN output which turns on when V+ drops below the
undervoltage threshold.
SGND (Pin 5): Small Signal Ground. Must be routed
separately from other grounds to the system ground.
GND (Pins 5, 11): Ground Connection.
PGND (Pin 6): Bottom Driver Power Ground. Connects to
source of bottom N-channel MOSFET.
B GATE FB (Pins 6, 12): Bottom Gate Feedback. Must
connect directly to the bottom power MOSFET gate. The
top MOSFET turn-on is inhibited until Bottom Gate Feed-
back pins have discharged to below 2.5V.
B GATE FB (Pin 8): Bottom Gate Feedback. Must connect
directly to the bottom power MOSFET gate. The top
MOSFET turn-on is inhibited until Pin 8 has discharged to
below 2.5V.
B GATE DR (Pins 13, 19): Bottom Gate Drive. The high
current drive point for the bottom MOSFET. When a gate
resistor is used it is inserted between the Bottom Gate
Drive pin and the gate of the MOSFET.
PV+ (Pins 14, 20): Bottom Driver Supply. Must be con-
nected to the same supply as Pins 1 and 7.
B GATE DR (Pin 9): Bottom Gate Drive. The high current
drive point for the bottom MOSFET. When a gate resistor
is used it is inserted between Pin 9 and the gate of the
MOSFET.
PV+ (Pin10):BottomDriverSupply. Mustbeconnectedto
the same supply as Pin 1.
T SOURCE (Pins 15, 21): Top Driver Return. Connects to
the top MOSFET source and the low side of the bootstrap
capacitor.
T SOURCE (Pin 11): Top Driver Return. Connects to the
top MOSFET source and the low side of the bootstrap
capacitor.
T GATE FB (Pins 16, 22): Top Gate Feedback. Must
connect directly to the top power MOSFET gate. The
bottomMOSFETturn-onisinhibiteduntilVTGF–VTSOURCE
has discharged to below 2.9V.
T GATE FB (Pin 12): Top Gate Feedback. Must connect
directly to the top power MOSFET gate. The bottom
MOSFETturn-onisinhibiteduntilV12–V11hasdischarged
to below 2.9V.
TGATEDR(Pins17, 23):TopGateDrive. Thehighcurrent
drive point for the top MOSFET. When a gate resistor is
used it is inserted between the Top Gate Drive pin and the
gate of the MOSFET.
TGATEDR(Pin13):TopGateDrive.Thehighcurrentdrive
point for the top MOSFET. When a gate resistor is used it
is inserted between Pin 13 and the gate of the MOSFET.
BOOST (Pins 18, 24): Top Driver Supply. Connects to the
high side of the bootstrap capacitor.
BOOST (Pin 14): Top Driver Supply. Connects to the high
side of the bootstrap capacitor.
11602fb
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Linear Systems [ Linear Systems ]
