LTC1147-3.3
LTC1147-5/LTC1147L
PI FU CTIO S
V
IN
(Pin 1):
Main Supply Pin. Must be closely decoupled
to ground Pin 7.
C
T
(Pin 2):
External capacitor C
T
from Pin 2 to ground sets
the operating frequency. The actual frequency is also
dependent upon the input voltage.
I
TH
(Pin 3):
Gain Amplifier Decoupling Point. The current
comparator threshold increases with the Pin 3 voltage.
(Pin 4):
Connects to internal resistive divider
which sets the output voltage. Pin 4 is also the (–) input for
the current comparator.
SENSE
+
(Pin 5):
The (+) input to the current comparator.
A built-in offset between Pins 4 and 5 in conjunction with
R
SENSE
sets the current trip threshold.
SENSE
–
SHDN/V
FB
(Pin 6):
When grounded, the fixed output
versions of the LTC1147 family operate normally. Pulling
Pin 6 high holds the P-channel MOSFET off and puts the
LTC1147 in micropower shutdown mode. Requires CMOS
logic signal with t
r
, t
f
< 1µs. Do not leave this pin floating.
On the LTC1147L this pin serves as the feedback pin from
an external resistive divider used to set the output voltage.
GND (Pin 7):
Two independent ground lines must be
routed separately to: 1) the (–) terminal of C
OUT
, and 2) the
cathode of the Schottky diode and (–) terminal of C
IN
.
PDRIVE (Pin 8):
High current drive for the P-channel
MOSFET. Voltage swing at this pin is from V
IN
to ground.
FU CTIO AL DIAGRA
V
SLEEP
R
Q
S
C
25mV TO 150mV
–
+
5pF
V
OS
+
S
T
13k
I
TH
3
G
2
C
T
OFF-TIME
CONTROL
V
IN
SENSE
–
SHDN 6
REFERENCE
LTC1147 • FD
–
–
V
TH2
V
TH1
–
+
+
–
+
W
+
–
U
U
U
U
U
Pin 6 Connection Shown For LTC1147-3.3 and LTC1147-5; Changes Create LTC1147L.
SENSE
+
1 V
IN
5
V
FB
6
7 GND
SENSE
–
4
8 PDRIVE
1.25V
100k
sn1147 1147fds
5
LINEAR [ LINEAR INTEGRATED SYSTEMS ]
