LTC3547
U
W U U
APPLICATIO S I FOR ATIO
Efficiency Considerations
bottom MOSFET switches. The gate charge losses are
proportional to V and thus their effects will be more
IN
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
pronounced at higher supply voltages.
2
3) I R losses are calculated from the DC resistances of
the internal switches, R , and external inductor,
SW
R . In continuous mode, the average output current
L
flows through inductor L, but is “chopped” between
the internal top and bottom switches. Thus, the series
resistance looking into the SW pin is a function of both
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc., are the individual losses as a percent-
age of input power.
top and bottom MOSFET R
(DC) as follows:
and the duty cycle
DS(ON)
Although all dissipative elements in the circuit produce
losses, four sources usually account for the losses in
R
= (R
) • (DC) + (R
) • (1– DC)
(5)
SW
DS(ON)TOP
DS(ON)BOT
LTC3547 circuits: 1) V quiescent current, 2) switching
IN
2
The R
for both the top and bottom MOSFETs can
losses, 3) I R losses, 4) other system losses.
DS(ON)
be obtained from the Typical Performance Character-
1) The V current is the DC supply current given in the
2
IN
istics curves. Thus, to obtain I R losses:
Electrical Characteristics which excludes MOSFET
2
2
I R losses = I
• (R + R )
SW L
driver and control currents. V current results in a
OUT
IN
small (<0.1%) loss that increases with V , even at
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4) Other “hidden” losses, such as copper trace and in-
ternal battery resistances, can account for additional
efficiency degradations in portable systems. It is very
important to include these “system” level losses in
the design of a system. The internal battery and fuse
resistancelossescanbeminimizedbymakingsurethat
no load.
2) The switching current is the sum of the MOSFET driver
and control currents. The MOSFET driver current re-
sults from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
C has adequate charge storage and very low ESR at
IN
the switching frequency. Other losses, including diode
conduction losses during dead-time, and inductor
core losses, generally account for less than 2% total
additional loss.
from V to ground. The resulting dQ/dt is a current out
IN
of V that is typically much larger than the DC bias cur-
IN
rent.Incontinuousmode,I
Q and Q are the gate charges of the internal top and
=f (Q +Q ),where
GATECHG
O T B
T
B
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