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CP2000AC54TEZ 参数 Datasheet PDF下载

CP2000AC54TEZ图片预览
型号: CP2000AC54TEZ
PDF下载: 下载PDF文件 查看货源
内容描述: [100-120/200-277VAC input; Default Outputs: ±54VDC @ 2000W, 5VDC @ 4W]
分类和应用:
文件页数/大小: 20 页 / 572 K
品牌: LINEAGEPOWER [ LINEAGE POWER CORPORATION ]
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Data Sheet  
GE  
CP2000AC54TE CPL High Efficiency Rectifier  
100-120/200-277VAC input; Default Outputs: ±54VDC @ 2000W, 5VDC @ 4W  
-58  
3.3Vdc  
Control and Status  
The Rectifier provides three means for monitor/control: analog,  
-54  
PMBus™, or the GE Galaxy-based RS485 protocol.  
-46  
-44  
Details of analog control and the PMBus™ based protocol are  
provided in this data sheet. GE will provide separate  
Vcontrol  
application notes on the Galaxy RS485 based protocol for  
users to interface to the rectifier. Contact your local GE  
representative for details.  
Signal Reference  
Unless otherwise noted, all signals are referenced to  
Logic_GRD. See the Signal Definitions Table at the end of this  
document for further description of all the signals.  
0
0.1  
3.3  
3.0  
Vcontrol (Vdc)  
Figure 13. Diagram showing how output can be margined  
using Vcontrol adjustment.  
Logic_GRD is isolated from the main output of the power  
supply for PMBus communications. Communications and the  
5V standby output are not connected to main power return  
(Vout(-)) and can be tied to the system digital ground point  
selected by the user. (Note that RS485 communications is  
referenced to Vout(-), main power return of the power supply).  
Module Present Signal: This signal has dual functionality. It  
can be used to alert the system when a rectifier is inserted. A  
500resistor is present in series between this signal and  
Logic_GRD. An external pull-up should not raise the voltage on  
the pin above 0.25VDC. When the voltage on this pin exceeds  
1VDC, the write_protect feature of the EEPROM is enabled.  
Logic_GRD is capacitively coupled to Frame_GRD inside the  
power supply. The maximum voltage differential between  
Logic_GRD and Frame_GRD should be less than 100VDC.  
8V_INT: Single wire connection between modules, Provides  
bias to the DSP of an unpowered module.  
Reset: This is a PCA9541 multiplexer function utilized during  
PMBus communications. If momentarily grounded (Logic_GRD),  
the multiplexer would reset itself.  
Control Signals  
Enable: Controls the main 54VDC output when either analog  
control or PMBus protocols are selected, as configured by the  
Protocol pin. This pin must be pulled low to turn ON the  
rectifier. The rectifier will turn OFF if either the Enable or the  
ON/OFF pin is released. This signal is referenced to Logic_GRD.  
In RS485 mode this pin is ignored.  
Protocol: Establishes the communications mode of the  
rectifier, between analog/PMBus and RS485 modes. For RS485,  
connect a 10kpull-down resistor from this pin to V_OUT( - ).  
For analog/PMBus leave the pin open. Do not tie this signal pin  
to V_OUT( - ) because that connection configures the internal  
DSP into a reprogrammed state.  
ON/OFF: This is a shorter pin utilized for hot-plug applications  
to ensure that the rectifier turns OFF before the power pins are  
disengaged. It also ensures that the rectifier turns ON only  
after the power pins have been engaged. Must be connected  
to V_OUT ( - ) for the rectifier to be ON.  
Unit Address: Each module has an internal 10kresistor  
pulled up between unit_address and 3.3VDC. A resistor  
between unit_address and Vout(-) sets the appropriate unit  
address.  
Shelf Address: By applying the required voltage between the  
shelf address pin and Vout(-), up to 8 different shelves and so  
up to 32 different modules can be addressed using either the  
PMBus or GE Galaxy based RS485 protocol.  
Margining: The 54VDC output can be adjusted between 44 –  
58VDC by a control voltage on the Margin pin. This control  
voltage can be generated either from an external voltage  
source, or by forming a voltage divider between 3.3V and  
Logic_GRD, as shown in Fig. 13. The power supply includes the  
high side pull-up 10kresistor to 3.3VDC. Connecting a resistor  
between the margin pin and Logic_GRD will complete the  
divider.  
PMBus addressing is limited to a maximum of 8 modules and  
so the software decodes the shelf address setting into either  
shelf 0 or shelf 1 in PMBus applications. If more than two  
shelves are paralleled, the user must separate the I2C lines so  
that address conflicts do not occur.  
An open circuit, or a voltage level > 3.0VDC, on this pin sets the  
main output to the factory default setting of 54VDC  
.
Hardware margining is only effective until software  
commanded output voltage changes are not executed.  
Software commanded output voltage settings permanently  
override the hardware margin setting until power to the  
internal controller is interrupted, for example if input power or  
bias power is recycled.  
Shelf_address  
Maximum voltage  
Nominal voltage  
Minimum voltage  
Address bit- A2  
1
2
2.97  
2.86  
2.60  
1
3
2.56  
2.4  
2.18  
0
4
2.14  
1.96  
1.73  
1
3.45  
3.30  
3.00  
0
Shelf_address  
Maximum voltage  
Nominal voltage  
Minimum voltage  
Address bit- A2  
5
6
1.25  
1.10  
0.84  
1
7
0.80  
0.60  
0.30  
0
8
0.25  
0.01  
0
The controller always restarts into its default configuration,  
programmed to set the output as instructed by the margin pin.  
Subsequent software commanded settings permanently  
override the margin pin. Adding a resistor between margin and  
Vout(-) is an ideal way of changing the factory set point of the  
rectifier to whatever voltage level is desired by the user.  
1.70  
1.50  
1.29  
0
1
August 16, 2013  
©2013 General Electric Company. All rights reserved.  
Page 9  
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