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AXH010A0X3Z 参数 Datasheet PDF下载

AXH010A0X3Z图片预览
型号: AXH010A0X3Z
PDF下载: 下载PDF文件 查看货源
内容描述: 3.0VDC - 5.5VDC输入; 0.75〜 3.63Vdc输出; 10A输出电流 [3.0Vdc - 5.5Vdc input; 0.75 to 3.63Vdc Output; 10A Output Current]
分类和应用:
文件页数/大小: 17 页 / 696 K
品牌: LINEAGEPOWER [ LINEAGE POWER CORPORATION ]
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Data Sheet  
Austin LynxTM SIP Non-isolated Power Modules, Programmable:  
3.0Vdc – 5.5Vdc input; 0.75 to 3.63Vdc Output; 10A Output Current  
April 1, 2008  
Test Configurations  
Design Considerations  
Input Filtering  
CURRENT PROBE  
TO OSCILLOSCOPE  
Austin LynxTM SIP module should be connected to a  
low-impedance source. A highly inductive source can  
LTEST  
VIN(+)  
1μH  
affect the stability of the module. An input capacitance  
must be placed directly adjacent to the input pin of the  
module, to minimize input ripple voltage and ensure  
module stability.  
CIN  
CS 1000μF  
Electrolytic  
2x100μF  
Tantalum  
E.S.R.<0.1Ω  
To minimize input voltage ripple, low-ESR polymer and  
@ 20°C 100kHz  
ceramic capacitors are recommended at the input of the  
COM  
module. Figure 27 shows input ripple voltage (mVp-p)  
for various outputs with 1x150 µF polymer capacitors  
(Panasonic p/n: EEFUE0J151R, Sanyo p/n:  
NOTE: Measure input reflected ripple current with a simulated  
source inductance (LTEST) of 1μH. Capacitor CS offsets  
possible battery impedance. Measure current as shown  
above.  
6TPE150M) in parallel with 1 x 47 µF ceramic capacitor  
(Panasonic p/n: ECJ-5YB0J476M, Taiyo- Yuden p/n:  
CEJMK432BJ476MMT) at full load. Figure 28 shows  
the input ripple with 3x150 µF polymer capacitors in  
parallel with 2 x 47 µF ceramic capacitor at full load.  
Figure 24. Input Reflected Ripple Current Test  
Setup.  
180  
160  
140  
120  
100  
80  
COPPER STRIP  
VO(+)  
COM  
RESISTIVE  
LOAD  
1uF  
.
10uF  
SCOPE  
60  
GROUND PLANE  
3.3Vin  
40  
NOTE: All voltage measurements to be taken at the module  
terminals, as shown above. If sockets are used then  
Kelvin connections are required at the module terminals  
to avoid measurement errors due to socket contact  
resistance.  
5Vin  
20  
0
0.5  
1
1.5  
2
2.5  
3
3.5  
Figure 25. Output Ripple and Noise Test Setup.  
Output Voltage (Vdc)  
Figure 27. Input ripple voltage for various output  
with 1x150 µF polymer and 1x47 µF ceramic  
capacitors at the input (full load).  
Rdistribution Rcontact  
Rcontact Rdistribution  
VIN(+)  
VO  
120  
100  
80  
RLOAD  
VO  
VIN  
Rdistribution Rcontact  
Rcontact Rdistribution  
COM  
COM  
60  
NOTE: All voltage measurements to be taken at the module  
terminals, as shown above. If sockets are used then  
Kelvin connections are required at the module terminals  
to avoid measurement errors due to socket contact  
resistance.  
40  
3.3Vin  
20  
5Vin  
0
Figure 26. Output Voltage and Efficiency Test Setup.  
0.5  
1
1.5  
2
2.5  
3
3.5  
VO. IO  
Output Voltage (Vdc)  
Efficiency  
=
x
100 %  
η
VIN. IIN  
Figure 28. Input ripple voltage for various output  
with 3x150 µF polymer and 2x47 µF ceramic  
capacitors at the input (full load)  
LINEAGE POWER  
10