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ATS025A0X53 参数 Datasheet PDF下载

ATS025A0X53图片预览
型号: ATS025A0X53
PDF下载: 下载PDF文件 查看货源
内容描述: 4.5 - 5.5V直流输入; 0.8 - 3.63Vdc输出; 30A的输出电流, 6.0 - 14VDC输入; 0.8 - 5.5V直流输出; 25A的输出电流 [4.5 - 5.5Vdc input; 0.8 - 3.63Vdc output; 30A output current, 6.0 - 14Vdc input; 0.8 - 5.5Vdc output; 25A output current]
分类和应用:
文件页数/大小: 20 页 / 1080 K
品牌: LINEAGEPOWER [ LINEAGE POWER CORPORATION ]
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Data Sheet  
Austin MegaLynxTM: Non-Isolated DC-DC Power Modules:  
4.5 – 5.5Vdc input; 0.8 – 3.63Vdc output; 30A output current  
6.0 – 14Vdc input; 0.8 – 5.5Vdc output; 25A output current  
June 3, 2009  
Test Configurations  
Design Considerations  
The Austin MegaLynxTM module should be connected to  
a low-impedance source. A highly inductive source can  
CURRENT PROBE  
TO OSCILLOSCOPE  
affect the stability of the module. An input capacitance  
must be placed directly adjacent to the input pin of the  
module, to minimize input ripple voltage and ensure  
LTEST  
VIN(+)  
1μH  
module stability.  
CIN  
Min  
To minimize input voltage ripple, low-ESR ceramic  
capacitors are recommended at the input of the module.  
Figure 41 shows the input ripple voltage for various  
CS 220μF  
E.S.R.<0.1Ω  
150μF  
@ 20°C 100kHz  
output voltages at 25A of load current with 2x22 µF or  
COM  
4x22 µF ceramic capacitors and an input of 12V. Figure  
42 shows data for the 5Vin case, with 2x47µF and  
4x47µF of ceramic capacitors at the input, and for a load  
current of 30A.  
NOTE: Measure input reflected ripple current with a simulated  
source inductance (LTEST) of 1μH. Capacitor CS offsets  
possible battery impedance. Measure current as shown  
above.  
180  
2 x 22uF  
4 x 22uF  
160  
140  
120  
100  
80  
Figure 37. Input Reflected Ripple Current Test Setup.  
COPPER STRIP  
VO(+)  
GND  
RESISTIVE  
LOAD  
SCOPE  
60  
40  
0.01uF  
10uF  
0.1uF  
20  
GROUND PLANE  
0
NOTE: All voltage measurements to be taken at the module  
terminals, as shown above. If sockets are used then  
Kelvin connections are required at the module terminals  
to avoid measurement errors due to socket contact  
resistance.  
0.5  
1
1.5  
Output Voltage (Vdc)  
Figure 41. Input ripple voltage for various output  
2
2.5  
3
3.5  
4
4.5  
5
5.5  
Figure 38. Output Ripple and Noise Test Setup.  
voltages with 2x22 µF or 4x22 µF ceramic capacitors  
at the input (25A load). Input voltage is 12V.  
Rdistribution Rcontact  
Rcontact Rdistribution  
60  
VIN(+)  
VO  
2 x 47uF  
50  
4 x 47uF  
RLOAD  
VO  
40  
30  
20  
10  
0
VIN  
Rdistribution Rcontact  
Rcontact Rdistribution  
COM  
COM  
NOTE: All voltage measurements to be taken at the module  
terminals, as shown above. If sockets are used then  
Kelvin connections are required at the module terminals  
to avoid measurement errors due to socket contact  
resistance.  
0.5  
1
1.5  
2
2.5  
3
3.5  
Figure 40. Output Voltage and Efficiency Test Setup.  
Output Voltage (Vdc)  
VO. IO  
Figure 42. Input ripple voltage in mV, p-p for various  
output voltages with 2x47 µF or 4x47 µF ceramic  
capacitors at the input (25A load). Input voltage is  
5V.  
Efficiency  
=
x
100 %  
η
VIN. IIN  
LINEAGE POWER  
12