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APXK004A0X-SRZ_10 参数 Datasheet PDF下载

APXK004A0X-SRZ_10图片预览
型号: APXK004A0X-SRZ_10
PDF下载: 下载PDF文件 查看货源
内容描述: 16V微微TLynxTM 4A :非隔离DC-DC电源模块 [16V Pico TLynxTM 4A: Non-Isolated DC-DC Power Modules]
分类和应用: 电源电路
文件页数/大小: 25 页 / 655 K
品牌: LINEAGEPOWER [ LINEAGE POWER CORPORATION ]
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Data Sheet  
16V Pico TLynxTM 4A: Non-isolated DC-DC Power Modules  
8 – 16Vdc input; 0.6Vdc to 8.0Vdc output; 4A output current  
September 13, 2010  
Test Configurations  
Design Considerations  
Input Filtering  
CURRENT PROBE  
TO OSCILLOSCOPE  
The 16V Pico TLynxTM 4A module should be  
connected to a low ac-impedance source. A highly  
inductive source can affect the stability of the  
module. An input capacitance must be placed  
directly adjacent to the input pin of the module, to  
minimize input ripple voltage and ensure module  
stability.  
LTEST  
VIN(+)  
1μH  
CIN  
CS 1000μF  
Electrolytic  
2x100μF  
Tantalum  
E.S.R.<0.1Ω  
@ 20°C 100kHz  
To minimize input voltage ripple, ceramic  
capacitors are recommended at the input of the  
module. Figure 52 shows the input ripple voltage  
for various output voltages at 4A of load current  
with 1x10 µF or 1x22 µF ceramic capacitors and an  
input of 12V.  
COM  
NOTE: Measure input reflected ripple current with a simulated  
source inductance (LTEST) of 1μH. Capacitor CS offsets  
possible battery impedance. Measure current as shown  
above.  
Figure 49. Input Reflected Ripple Current Test  
Setup.  
350  
300  
250  
200  
150  
COPPER STRIP  
RESISTIVE  
Vo+  
LOAD  
10uF  
0.1uF  
1x10uF  
1x22uF  
100  
50  
COM  
SCOPE USING  
BNC SOCKET  
0
GROUND PLANE  
0.5  
1.5  
2.5  
3.5  
4.5  
5.5  
6.5  
7.5  
NOTE: All voltage measurements to be taken at the module  
terminals, as shown above. If sockets are used then  
Kelvin connections are required at the module terminals  
to avoid measurement errors due to socket contact  
resistance.  
Output Voltage (Vdc)  
Figure 52. Input ripple voltage for various output  
voltages with 1x10 µF or 1x22 µF ceramic  
capacitors at the input (4A load). Input voltage is  
12V.  
Figure 50. Output Ripple and Noise Test Setup  
Rdistribution Rcontact  
Rcontact Rdistribution  
VIN(+)  
VO  
Output Filtering  
The 16V Pico TLynxTM 4A modules are designed for  
low output ripple voltage and will meet the maximum  
output ripple specification with 0.1 µF ceramic and 10  
µF ceramic capacitors at the output of the module.  
However, additional output filtering may be required  
by the system designer for a number of reasons.  
First, there may be a need to further reduce the  
output ripple and noise of the module. Second, the  
dynamic response characteristics may need to be  
customized to a particular load step change.  
RLOAD  
VIN  
VO  
Rdistribution Rcontact  
Rcontact Rdistribution  
COM  
COM  
NOTE: All voltage measurements to be taken at the module  
terminals, as shown above. If sockets are used then  
Kelvin connections are required at the module terminals  
to avoid measurement errors due to socket contact  
resistance.  
Figure 51. Output Voltage and Efficiency Test  
Setup.  
To reduce the output ripple and improve the dynamic  
response to a step load change, additional  
capacitance at the output can be used. Low ESR  
polymer and ceramic capacitors are recommended to  
improve the dynamic response of the module. Figure  
53 provides output ripple information for different  
external capacitance values at various Vo and for a  
load current of 4A. For stable operation of the module,  
limit the capacitance to less than the maximum output  
VO. IO  
Efficiency  
=
x
100 %  
η
VIN. IIN  
LINEAGE POWER  
14  
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