Data Sheet
Micro TLynxTM: Non-isolated DC-DC Power Modules:
May 20, 2009
2.4 – 5.5Vdc input; 0.6Vdc to 3.63Vdc output; 12A output current
Test Configurations
Design Considerations
Input Filtering
CURRENT PROBE
TO OSCILLOSCOPE
The Micro TLynxTM module should be connected to a
low ac-impedance source. A highly inductive source
can affect the stability of the module. An input
LTEST
VIN(+)
1μH
capacitance must be placed directly adjacent to the
input pin of the module, to minimize input ripple
voltage and ensure module stability.
CIN
CS 1000μF
Electrolytic
2x100μF
Tantalum
To minimize input voltage ripple, low-ESR ceramic
capacitors are recommended at the input of the module.
E.S.R.<0.1Ω
@ 20°C 100kHz
COM
Figure 34 shows the input ripple voltage for various
output voltages at 3A of load current with 1x47 µF or
2x47 µF ceramic capacitors and an input of 5V. Figure
35 shows data for the 3.3Vin case, with 1x47µF or
2x37µF of ceramic capacitors at the input.
NOTE: Measure input reflected ripple current with a simulated
source inductance (LTEST) of 1μH. Capacitor CS offsets
possible battery impedance. Measure current as shown
above.
140
120
100
80
Figure 31. Input Reflected Ripple Current Test
Setup.
COPPER STRIP
RESISTIVE
Vo+
LOAD
60
10uF
0.1uF
40
1x47uF
COM
20
2x47uF
SCOPE USING
BNC SOCKET
0
GROUND PLANE
0.5
1
1.5
2
2.5
3
3.5
NOTE: All voltage measurements to be taken at the module
terminals, as shown above. If sockets are used then
Kelvin connections are required at the module terminals
to avoid measurement errors due to socket contact
resistance.
Figure 34. Input ripple voltage for various output
voltages with 1x47 µF or 2x47 µF ceramic
capacitors at the input (12A load). Input voltage is
5V.
Figure 32. Output Ripple and Noise Test Setup.
120
100
80
Rdistribution Rcontact
Rcontact Rdistribution
VIN(+)
VO
RLOAD
VO
VIN
60
40
Rdistribution Rcontact
Rcontact Rdistribution
COM
COM
1x47uF
20
2x47uF
NOTE: All voltage measurements to be taken at the module
terminals, as shown above. If sockets are used then
Kelvin connections are required at the module terminals
to avoid measurement errors due to socket contact
resistance.
0
0.5
1
1.5
2
2.5
3
Figure 35. Input ripple voltage in mV, p-p for
various output voltages with 1x47 µF or 2x47 µF
ceramic capacitors at the input (12A load). Input
voltage is 3.3V.
Figure 33. Output Voltage and Efficiency Test Setup.
VO. IO
Efficiency
=
x
100 %
η
VIN. IIN
LINEAGE POWER
11
LINEAGEPOWER [ LINEAGE POWER CORPORATION ]
