Data Sheet
Pico TLynxTM 6A: Non-isolated DC-DC Power Modules
May 20, 2009
2.4 – 5.5Vdc input; 0.6Vdc to 3.63Vdc output; 6A output current
Test Configurations
Design Considerations
Input Filtering
CURRENT PROBE
TO OSCILLOSCOPE
The Pico TLynxTM 6A modules should be connected
to a low ac-impedance source. A highly inductive
source can affect the stability of the module. An input
LTEST
VIN(+)
1μH
capacitance must be placed directly adjacent to the
input pin of the module, to minimize input ripple
voltage and ensure module stability.
CIN
CS 1000μF
Electrolytic
2x100μF
Tantalum
E.S.R.<0.1Ω
To minimize input voltage ripple, ceramic capacitors are
recommended at the input of the module. Figure 34
shows the input ripple voltage for various output
voltages at 6A of load current with 1x22 µF or 2x22 µF
ceramic capacitors and an input of 5V. Figure 35 shows
data for the 3.3Vin case, with 1x22µF or 2x22µF of
ceramic capacitors at the input.
@ 20°C 100kHz
COM
NOTE: Measure input reflected ripple current with a simulated
source inductance (LTEST) of 1μH. Capacitor CS offsets
possible battery impedance. Measure current as shown
above.
Figure 31. Input Reflected Ripple Current Test
Setup.
120
100
80
COPPER STRIP
RESISTIVE
60
Vo+
LOAD
40
10uF
0.1uF
1x22uF
20
COM
2x22uF
SCOPE USING
BNC SOCKET
0
GROUND PLANE
0.5
1
1.5
2
2.5
3
3.5
NOTE: All voltage measurements to be taken at the module
terminals, as shown above. If sockets are used then
Kelvin connections are required at the module terminals
to avoid measurement errors due to socket contact
resistance.
Output Voltage (Vdc)
Figure 34. Input ripple voltage for various output
voltages with 1x22 µF or 2x22 µF ceramic
capacitors at the input (6A load). Input voltage is 5V.
Figure 32. Output Ripple and Noise Test Setup.
120
Rdistribution Rcontact
Rcontact Rdistribution
100
80
VIN(+)
VO
RLOAD
VO
VIN
60
40
Rdistribution Rcontact
Rcontact Rdistribution
1x22uF
COM
COM
20
2x22uF
NOTE: All voltage measurements to be taken at the module
terminals, as shown above. If sockets are used then
Kelvin connections are required at the module terminals
to avoid measurement errors due to socket contact
resistance.
0
0.5
1
1.5
2
2.5
3
Output Voltage (Vdc)
Figure 33. Output Voltage and Efficiency Test Setup.
Figure 35. Input ripple voltage in mV, p-p for
various output voltages with 1x22 µF or 2x22 µF
ceramic capacitors at the input (6A load). Input
voltage is 3.3V.
VO. IO
Efficiency
=
x
100 %
η
VIN. IIN
LINEAGE POWER
11