LM201WE3
Liquid Crystal Display
Product Specification
Table 4. REQUIRED SIGNAL ASSIGNMENT FOR Flat Link (TI:SN75LVDS83) Transmitter
Pin # Pin Name
Require Signal
Power Supply for TTL Input
TTL Input (R7)
Pin # Pin Name
Require Signal
Ground pin for TTL
1
VCC
D5
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
GND
2
D26
TTL Input (DE)
3
D6
TTL Input (R5)
TX CLKIN
PWR DWN
PLL GND
PLL VCC
PLL GND
LVDS GND
TxOUT3ు
TxOUT3ృ
TTL Level clock Input
4
D7
TTL Input (G0)
Power Down Input
5
GND
D8
Ground pin for TTL
TTL Input (G1)
Ground pin for PLL
6
Power Supply for PLL
Ground pin for PLL
7
D9
TTL Input (G2)
8
D10
VCC
D11
D12
D13
GND
D14
D15
D16
VCC
D17
D18
D19
GND
D20
D21
D22
D23
VCC
D24
D25
TTL Input (G6)
Ground pin for LVDS
9
Power Supply for TTL Input
TTL Input (G7)
Positive LVDS differential data output 3
Negative LVDS differential data output 3
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
TTL Input (G3)
TX CLKOUTు Positive LVDS differential clock output
TX CLKOUTృ Negative LVDS differential clock output
TTL Input (G4)
Ground pin for TTL
TTL Input (G5)
TX OUT2ు
TX OUT2ృ
LVDS GND
LVDS VCC
TX OUT1ు
TX OUT1ృ
TX OUT0ు
TX OUT0ృ
LVDS GND
D27
Positive LVDS differential data output 2
Negative LVDS differential data output 2
Ground pin for LVDS
TTL Input (B0)
TTL Input (B6)
Power Supply for LVDS
Positive LVDS differential data output 1
Negative LVDS differential data output 1
Positive LVDS differential data output 0
Negative LVDS differential data output 0
Ground pin for LVDS
Power Supply for TTL Input
TTL Input (B7)
TTL Input (B1)
TTL Input (B2)
Ground pin for TTL Input
TTL Input (B3)
TTL Input (R6)
TTL Input (B4)
D0
TTL Input (R0)
TTL Input (B5)
D1
TTL Input (R1)
TTL Input (RSVD)
Power Supply for TTL Input
TTL Input (HSYNC)
TTL Input (VSYNC)
GND
Ground pin for TTL
D2
TTL Input (R2)
D3
TTL Input (R3)
D4
TTL Input (R4)
Notes : Refer to LVDS Transmitter Data Sheet for detail descriptions.
11 / 29
Ver. 1.0
Jun. 11. 2007
LG [ LG SEMICON CO.,LTD. ]
