LC230WX3
Liquid Crystal Display
Product Specification
3-3. Signal Timing Specifications
This is the signal timing required at the input of LVDS Transmitter. All of the interface signal timing should be
satisfied with the following specifications for it’s proper operation.
Table 8. TIMMING TABLE
ITEM
Symbol
fCLK
fH
Min.
68
Typ.
72.3
47.4
1366
Max.
82
Unit
MHz
KHZ
Clks
Note
3
Frequency
Clock
Frequency
45
53
Display Valid
tHV
1366
1366
Hsync
Blank
tHT- HV
tHT
fV
t
90
1456
47
162
1528
60
410
1776
66
Clks
Clks
HZ
Total
Frequency
Display Valid
Blank
3
tVV
768
7
768
22
768
295
1063
Lines
Lines
Lines
PAL :
Vsync
47~53Hz,
tVT-tVV
tVT
NTSC :
57~63Hz
Total
775
790
Notes:
1. The performance of the electro-optical characteristics are may be influenced by
variance of the vertical refresh rates.
2. Above timing table is only valid for DE Mode.
3. H sync ,V sync don’t care.( for only DE Mode)
12 / 28
Ver.1.0
Nov.22, 2005