Pinout Information
LatticeECP/EC Family Data Sheet
Lattice Semiconductor
LFECP/EC10 and LFECP/EC15 Logic Signal Connections: 256 fpBGA
LFECP10/LFEC10
LFECP15/LFEC15
Ball
Number
Ball Function Bank LVDS
Dual Function
Ball Function Bank LVDS
Dual Function
N7
R7
PB18B
PB19A
PB19B
PB20A
PB20B
PB21A
GND5
PB21B
PB22A
PB22B
PB23A
PB23B
PB24A
PB24B
PB25A
GND5
PB25B
PB26A
PB26B
PB27A
PB27B
PB28A
PB28B
PB29A
GND4
PB29B
PB30A
PB30B
PB31A
PB31B
PB32A
PB32B
PB33A
GND4
PB33B
PB34A
GND4
GND4
-
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
-
C
T
C
T
C
T
PB18B
PB19A
PB19B
PB20A
PB20B
PB21A
GND5
PB21B
PB22A
PB22B
PB23A
PB23B
PB24A
PB24B
PB25A
GND5
PB25B
PB26A
PB26B
PB27A
PB27B
PB28A
PB28B
PB29A
GND4
PB29B
PB30A
PB30B
PB31A
PB31B
PB32A
PB32B
PB33A
GND4
PB33B
PB34A
GND4
GND4
GND4
GND4
GND3
PR44B
PR44A
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
3
3
3
C
T
C
T
C
T
R8
M7
M8
T8
GND
T9
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
P8
BDQS22
BDQS22
N8
R9
R10
P9
VREF2_5
VREF1_5
PCLKT5_0
VREF2_5
VREF1_5
PCLKT5_0
N9
T10
GND
T11
T12
T13
P10
N10
T14
T15
M10
GND
M11
R11
P11
R13
R14
P12
P13
N11
GND
N12
R12
GND
GND
-
C
T
C
T
C
T
C
T
PCLKC5_0
WRITEN
CS1N
C
T
C
T
C
T
C
T
PCLKC5_0
WRITEN
CS1N
VREF1_4
CSN
VREF1_4
CSN
VREF2_4
D0/SPID7
D2/SPID5
VREF2_4
D0/SPID7
D2/SPID5
C
T
C
T
C
T
C
T
D1/SPID6
BDQS30
D3/SPID4
C
T
C
T
C
T
C
T
D1/SPID6
BDQS30
D3/SPID4
D4/SPID3
D5/SPID2
D4/SPID3
D5/SPID2
C
D6/SPID1
C
D6/SPID1
-
-
-
GND
N13
N14
GND3
PR36B
PR36A
3
3
3
C
T
VREF2_3
VREF1_3
C
T
VREF2_3
VREF1_3
4-33