Pinout Information
LatticeECP/EC Family Data Sheet
Lattice Semiconductor
LFECP/EC20, LFECP/EC33 Logic Signal Connections: 672 fpBGA (Cont.)
LFEC20/LFECP20
LFECP/EC33
Ball
Ball
Ball
Ball
Dual
Number Function Bank LVDS
Dual Function
VREF1_0
Number Function
Bank LVDS
Function
D13
C13
A13
B13
F13
F12
A12
GND
B12
A11
B11
D12
C12
B10
A10
G12
GND
A9
PT32B
PT32A
PT31B
PT31A
PT30B
PT30A
PT29B
GND0
PT29A
PT28B
PT28A
PT27B
PT27A
PT26B
PT26A
PT25B
GND0
PT25A
PT24B
PT24A
PT23B
PT23A
PT22B
PT22A
PT21B
GND0
PT21A
PT20B
PT20A
PT19B
PT19A
PT18B
PT18A
PT17B
GND0
PT17A
PT16B
PT16A
PT15B
PT15A
PT14B
PT14A
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
C
T
D13
C13
A13
B13
F13
F12
A12
GND
B12
A11
B11
D12
C12
B10
A10
G12
GND
A9
PT32B
PT32A
PT31B
PT31A
PT30B
PT30A
PT29B
GND0
PT29A
PT28B
PT28A
PT27B
PT27A
PT26B
PT26A
PT25B
GND0
PT25A
PT24B
PT24A
PT23B
PT23A
PT22B
PT22A
PT21B
GND0
PT21A
PT20B
PT20A
PT19B
PT19A
PT18B
PT18A
PT17B
GND0
PT17A
PT16B
PT16A
PT15B
PT15A
PT14B
PT14A
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
C
T
VREF1_0
VREF2_0
VREF2_0
C
T
C
T
C
T
C
T
TDQS30
TDQS22
TDQS14
TDQS30
TDQS22
TDQS14
C
C
T
C
T
T
C
T
C
T
C
T
C
T
C
T
C
C
T
C
T
T
C
T
E12
B9
E12
B9
F11
A8
C
T
F11
A8
C
T
D11
C11
B8
C
T
D11
C11
B8
C
T
C
C
GND
B7
GND
B7
T
C
T
T
C
T
E11
A7
E11
A7
G11
C7
C
T
G11
C7
C
T
G10
C6
C
T
G10
C6
C
T
C10
GND
D10
F10
A6
C
C10
GND
D10
F10
A6
C
T
C
T
C
T
C
T
T
C
T
C
T
C
T
E10
C9
E10
C9
G9
G9
D9
D9
4-74