Pinout Information
LatticeECP/EC Family Data Sheet
Lattice Semiconductor
LFECP/EC20 and LFECP/EC33 Logic Signal Connections: 484 fpBGA
LFECP20/LFEC20
LFECP/LFEC33
Ball Number Ball Function Bank LVDS
Dual Function
Ball Number Ball Function Bank LVDS
Dual Function
Y20
GND
GND
AA21
AB21
W19
V19
Y21
AA22
V20
GND
U20
W21
Y22
V21
W22
U21
V22
T19
PR48A
-
3
-
T
VREF1_3
Y20
GND
GND
AA21
AB21
W19
V19
Y21
AA22
V20
GND
U20
W21
Y22
V21
W22
U21
V22
T19
PR68A
GND3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
T
VREF1_3
-
-
GND3
PR47B
PR47A
PR46B
PR46A
PR45B
PR45A
PR44B
GND3
PR44A
PR43B
PR43A
PR42B
PR42A
PR41B
PR41A
CFG2
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
C
T
PR59B
PR59A
PR58B
PR58A
PR57B
PR57A
PR56B
GND3
C
T
C
T
C
T
C
T
C
T
RDQS45
RDQS57
C
RLM0_PLLC_IN_A
C
RLM0_PLLC_IN_A
T
C
T
C
T
C
T
RLM0_PLLT_IN_A
RLM0_PLLC_FB_A
RLM0_PLLT_FB_A
DI/CSSPIN
PR56A
PR55B
PR55A
PR54B
PR54A
PR53B
PR53A
CFG2
T
C
T
C
T
C
T
RLM0_PLLT_IN_A
RLM0_PLLC_FB_A
RLM0_PLLT_FB_A
DI/CSSPIN
DOUT/CSON
DOUT/CSON
BUSY/SISPI
BUSY/SISPI
D7/SPID0
D7/SPID0
U19
U18
V18
T20
CFG1
U19
U18
V18
T20
CFG1
CFG0
CFG0
PROGRAMN
CCLK
PROGRAMN
CCLK
T21
INITN
T21
INITN
R20
GND
T18
DONE
GND3
PR37B
PR37A
PR36B
PR36A
PR35B
GND3
PR35A
PR34B
PR34A
PR33B
PR33A
PR32B
PR32A
PR31B
GND3
PR31A
PR30B
PR30A
R20
GND
T18
DONE
GND3
C
T
PR49B
PR49A
PR48B
PR48A
PR47B
GND3
C
T
R17
R19
R18
U22
GND
T22
R17
R19
R18
U22
GND
T22
C
T
C
T
RDQS36
RDQS48
C
C
T
C
T
PR47A
PR46B
PR46A
PR45B
PR45A
PR44B
PR44A
PR43B
GND3
T
C
T
R21
R22
P20
N20
P19
P18
P21
GND
P22
N21
N22
R21
R22
P20
N20
P19
P18
P21
GND
P22
N21
N22
C
T
C
T
C
T
C
T
C
C
T
C
T
PR43A
PR42B
PR42A
T
C
T
4-54