Specifications ispLSI 5256VA
Figure 8. Boundary Scan Waveforms and Timing Specifications
TMS
TDI
T
T
bth
btsu
T
T
T
btcp
btch
btcl
TCK
TDO
T
T
T
btoz
btvo
btco
Valid Data
Valid Data
T
T
btcpsu
btcph
Data to be
captured
Data Captured
T
T
T
btuoz
btuov
btuco
Data to be
driven out
Valid Data
Valid Data
SYMBOL PARAMETER
MIN
MAX UNITS
t
125
62.5
62.5
25
25
50
–
–
ns
ns
btcp
btch
TCK [BSCAN test] clock pulse width
TCK [BSCAN test] pulse width high
TCK [BSCAN test] pulse width low
TCK [BSCAN test] setup time
t
t
–
–
ns
btcl
t
t
t
t
t
t
t
t
t
t
t
–
ns
btsu
bth
–
ns
TCK [BSCAN test] hold time
–
mV/ns
ns
rf
TCK [BSCAN test] rise and fall time
TAP controller falling edge of clock to valid output
25
25
25
–
btco
btoz
btvo
btcpsu
btcph
btuco
btuoz
btuov
–
ns
TAP controller falling edge of clock to data output disable
TAP controller falling edge of clock to data output enable
BSCAN test Capture register setup time
–
ns
25
25
–
ns
–
ns
BSCAN test Capture register hold time
50
50
50
ns
BSCAN test Update reg, falling edge of clock to valid output
–
ns
BSCAN test Update reg, falling edge of clock to output disable
BSCAN test Update reg, falling edge of clock to output enable
–
ns
9
LATTICE [ LATTICE SEMICONDUCTOR ]
