SpSepceifcicifaictaiotinosnsGGALA2L62C6VC1V21C2
AC Switching Characteristics
Over Recommended Operating Conditions (Unless Otherwise Specified)
COM
-7
IND
-10
TEST
DESCRIPTION
PARAM
UNITS
COND.1
MIN. MAX.
MIN. MAX.
tpd
tco
tcf2
tsu1
tsu2
th
A
Input or I/O to Comb. Output
Clock to Output Delay
1
1
7.5
4.5
2.5
—
1
1
10
7
ns
ns
ns
ns
ns
A
—
—
—
Clock to Feedback Delay
—
6
—
7
2.5
—
—
Setup Time, Input or Fdbk before Clk ↑
Setup Time, SP before Clock ↑
Hold Time, Input or Fdbk after Clk ↑
6
—
7
—
0
—
—
0
—
—
ns
A
Maximum Clock Frequency with
External Feedback, 1/(tsu + tco)
95.2
71.4
MHz
fmax3
A
A
Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
117.6
142.8
—
—
105
105
—
—
MHz
MHz
Maximum Clock Frequency with
No Feedback
twh
twl
—
—
B
Clock Pulse Duration, High
3.5
3.5
1
—
—
7.5
7.5
9
4
4
—
—
10
9
ns
ns
ns
ns
ns
ns
ns
ns
Clock Pulse Duration, Low
ten
tdis
tar
Input or I/O to Output Enabled
Input or I/O to Output Disabled
Input or I/O to Asynch. Reset of Reg.
Asynchronous Reset Pulse Duration
Asynch. Reset to Clk↑ Recovery Time
Synch. Preset to Clk ↑ Recovery Time
1
C
1
1
A
1
1
13
—
—
—
tarw
tarr
tspr
—
—
—
7
—
—
—
8
5
8
5
10
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Specification section.
3) Refer to fmax Specification section.
Capacitance (TA = 25°C, f = 1.0 MHz)
SYMBOL
PARAMETER
Input Capacitance
I/O Capacitance
MAXIMUM*
UNITS
pF
TEST CONDITIONS
VCC = 5.0V, VI = 2.0V
VCC = 5.0V, VI/O = 2.0V
CI
8
8
CI/O
pF
*Characterized but not 100% tested.
7
LATTICE [ LATTICE SEMICONDUCTOR ]
