SpSepceifcicifaictaiotinosnsGGALA2L22V21V01C0
AC Switching Characteristics
Over Recommended Operating Conditions
COM
-5
COM/IND
COM/IND
COM
-10
IND
-10
-7 (PLCC) -7 (PDIP)
TEST
COND.1
DESCRIPTION
PARAM
UNITS
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.
tpd
tco
tcf2
tsu
th
A
A
Input or I/O to Combinatorial Output
Clock to Output Delay
1
1
5
4
1
1
7.5
4.5
3
1
1
7.5
4.5
3
3
2
10
7
1
1
10
7
ns
ns
ns
ns
—
—
Clock to Feedback Delay
—
3
3
—
4.5
—
5
—
7
2.5
—
—
7
2.5
—
Setup Time, Input or Fdbk before Clk↑
Hold Time, Input or Fdbk after Clk↑
—
—
—
—
0
—
—
0
—
—
0
—
—
0
—
—
0
—
—
ns
A
Maximum Clock Frequency with
External Feedback, 1/(tsu + tco)
142.8
111
105
71.4
71.4
MHz
fmax3
A
A
Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
166
200
—
—
133
166
—
—
125
—
—
105
105
—
—
105
105
—
—
MHz
MHz
Maximum Clock Frequency with
No Feedback
142.8
twh
twl
—
—
B
Clock Pulse Duration, High
2.5
2.5
1
—
—
6
3
3
1
1
1
7
5
5
—
—
7.5
7.5
9
3.5
3.5
1
—
—
7.5
7.5
9
4
4
—
—
10
9
4
4
—
—
10
9
ns
ns
ns
ns
ns
ns
ns
ns
Clock Pulse Duration, Low
ten
tdis
tar
Input or I/O to Output Enabled
Input or I/O to Output Disabled
Input or I/O to Asynch. Reset of Reg.
Asynch. Reset Pulse Duration
Asynch. Reset to Clk↑ Recovery Time
Synch. Preset to Clk↑ Recovery Time
3
1
C
1
6
1
3
1
A
1
5.5
—
—
—
1
3
13
—
—
—
1
13
—
—
—
tarw
tarr
tspr
—
—
—
5.5
4
—
—
—
7
—
—
—
8
8
5
8
8
4
5
10
10
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Description section.
3) Refer to fmax Description section. Characterized initially and after any design or process changes that may affect these
parameters.
Capacitance (TA = 25°C, f = 1.0 MHz)
SYMBOL
PARAMETER
Input Capacitance
I/O Capacitance
MAXIMUM*
UNITS
pF
TEST CONDITIONS
VCC = 5.0V, VI = 2.0V
VCC = 5.0V, VI/O = 2.0V
CI
8
8
CI/O
pF
*Characterized but not 100% tested.
10
LATTICE [ LATTICE SEMICONDUCTOR ]
