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GAL20XV10 参数 Datasheet PDF下载

GAL20XV10图片预览
型号: GAL20XV10
PDF下载: 下载PDF文件 查看货源
内容描述: 高速E2CMOS PLD通用阵列逻辑 [High-Speed E2CMOS PLD Generic Array Logic]
分类和应用:
文件页数/大小: 14 页 / 235 K
品牌: LATTICE [ LATTICE SEMICONDUCTOR ]
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Specifications
GAL20XV10
AC Switching Characteristics
Over Recommended Operating Conditions
COM
COM
COM
TEST
PARAMETER
COND.
1
DESCRIPTION
Input or I/O to Combinatorial Output
Clock to Output Delay
Clock to Feedback Delay
Setup Time, Input or Feedback before Clock↑
Hold Time, Input or Feedback after Clock↑
Maximum Clock Frequency with
External Feedback, 1/(tsu + tco)
Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
Maximum Clock Frequency with
No Feedback
Clock Pulse Duration, High
Clock Pulse Duration, Low
Input or I/O to Output Enabled
OE to Output Enabled
Input or I/O to Output Disabled
OE to Output Disabled
3
2
6
0
76.9
100
100
4
4
3
2
3
2
-10
MIN. MAX.
10
7
4
10
9
9
9
-15
MIN. MAX.
3
2
8
0
62.5
83.3
83.3
6
6
3
2
3
2
15
8
4
15
10
15
10
-20
MIN. MAX.
3
2
10
0
50
71.4
71.4
7
7
3
2
3
2
20
10
4
20
15
20
15
UNITS
ns
ns
ns
ns
ns
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
t
pd
t
co
t
cf
2
t
su
t
h
A
A
A
f
max
3
A
A
t
wh
t
wl
t
en
t
dis
B
B
C
C
1) Refer to
Switching Test Conditions
section.
2) Calculated from
fmax
with internal feedback. Refer to
fmax Description
section.
3) Refer to
fmax Description
section.
Capacitance (T
A
= 25°C, f = 1.0 MHz)
SYMBOL
C
I
C
I/O
PARAMETER
Input Capacitance
I/O Capacitance
MAXIMUM*
8
8
UNITS
pF
pF
TEST CONDITIONS
V
CC
= 5.0V,
V
I
= 2.0V
V
CC
= 5.0V,
V
I/O
= 2.0V
*Characterized but not 100% tested
9