Specifications GAL16LV8
Simple Mode
In the Simple mode, macrocells are configured as dedicated inputs Pins 1 and 11 are always available as data inputs into the AND
or as dedicated, always active, combinatorial outputs.
array. The center two macrocells (pins 15 & 16) cannot be used
as input or I/O pins, and are only available as dedicated outputs.
Architecture configurations available in this mode are similar to the
common 10L8 and 12P6 devices with many permutations of ge- The JEDEC fuse numbers including the UES fuses and PTD fuses
neric output polarity or input choices.
are shown on the logic diagram.
All outputs in the simple mode have a maximum of eight product
terms that can control the logic. In addition, each output has pro-
grammable polarity.
Combinatorial Output with Feedback Configuration
for Simple Mode
Vcc
- SYN=1.
- AC0=0.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=0 defines this configuration.
- All OLMC except pins 15 & 16 can be configured to
this function.
XOR
Combinatorial Output Configuration for Simple Mode
Vcc
- SYN=1.
- AC0=0.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=0 defines this configuration.
- Pins 15 & 16 are permanently configured to this
function.
XOR
Dedicated Input Configuration for Simple Mode
- SYN=1.
- AC0=0.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=1 defines this configuration.
- All OLMC except pins 15 & 16 can be configured to
this function.
Note: The development software configures all of the architecture control bits and checks for proper pin usage automatically.
8
LATTICE [ LATTICE SEMICONDUCTOR ]
