DC and Switching Characteristics
LatticeECP2/M Family Data Sheet
Lattice Semiconductor
Typical Building Block Function Performance1
Pin-to-Pin Performance (LVCMOS25 12mA Drive)
Function
-7 Timing
Units
Basic Functions
16-bit Decoder
32-bit Decoder
64-bit Decoder
4:1 MUX
3.8
4.5
5.0
3.2
3.4
3.5
4.0
ns
ns
ns
ns
ns
ns
ns
8:1 MUX
16:1 MUX
32:1 MUX
1. These timing numbers were generated using the ispLEVER design tool. Exact performance may vary with device and tool version. The tool
uses internal parameters that have been characterized but are not tested on every device.
Timing v.A 0.11
Register-to-Register Performance
Function
Basic Functions
-7 Timing
Units
16-bit Decoder
32-bit Decoder
64-bit Decoder
4:1 MUX
599
542
417
847
803
660
577
591
500
306
488
378
260
253
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
8:1 MUX
16:1 MUX
32:1 MUX
8-bit Adder
16-bit Adder
64-bit Adder
16-bit Counter
32-bit Counter
64-bit Counter
64-bit Accumulator
Embedded Memory Functions
512x36 Single Port RAM, EBR Output
Registers
370
370
MHz
MHz
1024x18 True-Dual Port RAM (Write
Through or Normal, EBR Output Regis-
ters)
1024x18 True-Dual Port RAM (Write
Through or Normal, PLC Output
Registers)
280
MHz
Distributed Memory Functions
16x4 Pseudo-Dual Port RAM (One PFU)
32x4 Pseudo-Dual Port RAM
64x8 Pseudo-Dual Port RAM
DSP Functions
819
521
435
MHz
MHz
MHz
18x18 Multiplier (All Registers)
420
MHz
3-17