Pinout Information
LatticeECP2/M Family Data Sheet
Lattice Semiconductor
LFE2-6E/SE and LFE2-12E/SE Logic Signal Connections: 256 fpBGA (Cont.)
LFE2-6E/SE
LFE2-12E/SE
Ball
Number
Ball/Pad
Function
Ball/Pad
Function
Bank Dual Function
Differential
Bank
Dual Function
Differential
-
-
-
-
GNDIO1
VCCIO
PT37B
PT37A
GNDIO1
PT36B
PT35B
PT36A
PT35A
VCCIO1
PT34B
PT33B
PT34A
PT33A
GNDIO1
PT32B
PT31B
PT32A
PT31A
VCCIO1
PT30B
PT30A
XRES
1
1
1
1
-
-
-
D10
C10
GND
B10
A9
PT19B
PT19A
GNDIO1
PT18B
PT17B
PT18A
PT17A
VCCIO1
PT16B
PT15B
PT16A
PT15A
GNDIO1
PT14B
PT13B
PT14A
PT13A
VCCIO1
PT12B
PT12A
XRES
PT10B
GNDIO0
PT10A
PT9B
1
1
-
C
T
C
T
1
1
1
1
1
1
1
1
1
-
C
C
T
T
1
1
1
1
1
1
1
1
1
-
C
C
T
T
A10
B9
VCCIO
A8
C
C
T
T
C
C
T
T
D9
B8
C9
GND
B7
1
1
1
1
1
1
1
-
C
C
T
T
1
1
1
1
1
1
1
1
0
-
C
C
T
T
E9
A7
D8
VCCIO
A6
PCLKC1_0
PCLKT1_0
C
T
PCLKC1_0
PCLKT1_0
C
T
B6
E6
F8
0
-
PCLKC0_0
PCLKT0_0
C
PT28B
GNDIO0
PT28A
PT27B
PT26B
PT27A
VCCIO0
PT26A
PT25B
PT24B
PT25A
PT24A
PT23B
GNDIO0
PT22B
PT23A
VCCIO0
PT22A
PT21B
PT21A
GNDIO0
VCCIO
PCLKC0_0
PCLKT0_0
C
GND
E8
0
0
0
0
0
0
0
0
0
0
0
-
T
C
C
T
0
0
0
0
0
0
0
0
0
0
0
-
T
C
C
T
A5
A3
PT8B
A4
PT9A
VCCIO
B3
VCCIO0
PT8A
T
C
C
T
T
C
C
T
A2
PT7B
C7
PT6B
B2
PT7A
D7
PT6A
T
T
D6
PT5B
C
C
GND
F7
GNDIO0
PT4B
0
0
0
0
0
0
-
C
T
0
0
0
0
0
0
0
0
C
T
C6
PT5A
VCCIO
F6
VCCIO0
PT4A
T
C
T
T
C
T
C4
PT3B
B4
PT3A
-
-
-
-
-
4-36