Pinout Information
LatticeECP2/M Family Data Sheet
Lattice Semiconductor
LFE2-70E/SE Logic Signal Connections: 900 fpBGA (Cont.)
LFE2-70E/SE
Ball Number
P3
Ball/Pad Function
PL54B
PL55A
VCCIO7
PL55B
PL56A
PL56B
PL57A
GNDIO7
PL57B
PL59A
PL59B
PL60A
PL60B
PL61A
VCCIO6
PL61B
PL62A
PL62B
PL63A
GNDIO6
PL63B
PL64A
PL64B
VCCIO6
PL65A
PL65B
PL66A
PL66B
GNDIO6
PL67A
PL67B
PL68A
PL68B
VCCIO6
PL69A
PL69B
PL70A
PL70B
GNDIO6
PL71A
PL71B
PL72A
VCCIO6
Bank
7
7
7
7
7
7
7
-
Dual Function
LDQ54
Differential
C (LVDS)*
T
R6
LDQ54
VCCIO
R8
LDQ54
LDQ54
C
P2
T (LVDS)*
C (LVDS)*
T
P1
LDQ54
R5
PCLKT7_0/LDQ54
GND
R7
7
6
6
6
6
6
6
6
6
6
6
-
PCLKC7_0/LDQ54
PCLKT6_0/LDQ63
PCLKC6_0/LDQ63
VREF2_6/LDQ63
VREF1_6/LDQ63
LDQ63
C
R4
T (LVDS)*
C (LVDS)*
T
R3
T5
T7
C
T3
T (LVDS)*
VCCIO
T4
LDQ63
LDQ63
LDQ63
LDQS63
C (LVDS)*
T6
T
C
T8
T2
T (LVDS)*
GND
T1
6
6
6
6
6
6
6
6
-
LDQ63
LDQ63
LDQ63
C (LVDS)*
U7
T
U5
C
VCCIO
U4
LDQ63
LDQ63
LDQ63
LDQ63
T (LVDS)*
U3
C (LVDS)*
U8
T
U6
C
GND
U2
6
6
6
6
6
6
6
6
6
-
LDQ71
LDQ71
LDQ71
LDQ71
T (LVDS)*
U1
C (LVDS)*
V7
T
V5
C
VCCIO
V2
LDQ71
LDQ71
LDQ71
LDQ71
T (LVDS)*
V1
C (LVDS)*
V8
T
V6
C
GND
W1
6
6
6
6
LDQS71
LDQ71
LDQ71
T (LVDS)*
C (LVDS)*
T
W2
W5
VCCIO
4-111
LATTICE [ LATTICE SEMICONDUCTOR ]
