Pinout Information
LatticeECP2/M Family Data Sheet
Lattice Semiconductor
LFE2-35E/SE and LFE2-50E/SE Logic Signal Connections: 484 fpBGA
LFE2-35E/SE
LFE2-50E/SE
Ball
Ball/Pad
Function
Ball/Pad
Function
Number
Bank
2
2
-
Dual Function
Differential
Bank
2
2
-
Dual Function
Differential
C22
VCCIO
GNDIO
D19
PR10A
VCCIO2
GNDIO2
PR2B
RDQ14
T (LVDS)*
PR12A
VCCIO
GNDIO2
PR2B
RDQ16
T (LVDS)*
2
2
1
-
VREF2_2/RDQ6
VREF1_2/RDQ6
VREF2_1
C (LVDS)*
T (LVDS)*
C
2
2
1
-
VREF2_2
VREF1_2
VREF2_1
C (LVDS)*
T (LVDS)*
C
E19
PR2A
PR2A
B21
PT73B
GNDIO1
PT73A
PT72B
PT72A
PT71B
VCCIO1
PT71A
PT70B
PT70A
PT69B
PT69A
PT68B
GNDIO1
PT68A
PT67B
VCCIO1
PT67A
PT66B
PT66A
PT65B
PT65A
GNDIO1
VCCIO1
PT55B
GNDIO1
PT55A
PT54B
PT54A
PT53B
VCCIO1
PT53A
PT52B
PT52A
PT51B
PT51A
GNDIO1
PT49B
VCCIO1
PT49A
PT48B
PT48A
PT82B
GNDIO1
PT82A
PT81B
PT81A
PT80B
VCCIO
PT80A
PT79B
PT79A
PT78B
PT78A
PT77B
GNDIO1
PT77A
PT76B
VCCIO
PT76A
PT75B
PT75A
PT74B
PT74A
GNDIO1
VCCIO
PT64B
GNDIO1
PT64A
PT63B
PT63A
PT62B
VCCIO
PT62A
PT61B
PT61A
PT60B
PT60A
GNDIO1
PT58B
VCCIO
PT58A
PT57B
PT57A
GNDIO
B22
1
1
1
1
1
1
1
1
1
1
1
-
VREF1_1
T
C
T
1
1
1
1
1
1
1
1
1
1
1
-
VREF1_1
T
C
T
C20
C19
D18
C
C
VCCIO
E18
T
C
T
T
C
T
B20
A19
D17
C
T
C
T
C18
A21
C
C
GNDIO
A20
1
1
1
1
1
1
1
1
-
T
1
1
1
1
1
1
1
1
-
T
A18
C
C
VCCIO
B18
T
C
T
C
T
T
C
T
C
T
G16
G15
D16
E16
GNDIO
VCCIO
C17
1
1
-
1
1
-
C
C
GNDIO
C16
1
1
1
1
1
1
1
1
1
1
-
T
C
T
1
1
1
1
1
1
1
1
1
1
-
T
C
T
B17
B16
A17
C
C
VCCIO
A16
T
C
T
C
T
T
C
T
C
T
C15
D15
E15
F15
GNDIO
B15
1
1
1
1
1
C
1
1
1
1
1
C
VCCIO
A15
T
C
T
T
C
T
B14
A14
4-67
LATTICE [ LATTICE SEMICONDUCTOR ]
