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2096VE 参数 Datasheet PDF下载

2096VE图片预览
型号: 2096VE
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3V在系统可编程SuperFAST⑩高密度PLD [3.3V In-System Programmable SuperFAST⑩ High Density PLD]
分类和应用:
文件页数/大小: 12 页 / 161 K
品牌: LATTICE [ LATTICE SEMICONDUCTOR ]
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Specifications ispLSI 2096VE  
Power Consumption  
used. Figure 3 shows the relationship between power  
and operating speed.  
Power consumption in the ispLSI 2096VE device de-  
pends on two primary factors: the speed at which the  
device is operating and the number of Product Terms  
Figure 3. Typical Device Power Consumption vs fmax  
240  
220  
200  
ispLSI 2096VE  
180  
160  
140  
120  
0
50  
100  
150  
200  
fmax (MHz)  
Notes: Configuration of six 16-bit counters  
Typical current at 3.3V, 25° C  
I
I
can be estimated for the ispLSI 2096VE using the following equation:  
(mA) = 8.0 + (# of PTs * 0.63) + (# of Nets * Max Freq * 0.005)  
CC  
CC  
Where:  
# of PTs = Number of Product Terms used in design  
# of nets = Number of Signals used in device  
Max freq = Highest Clock Frequency to the device (in MHz)  
The I  
CC  
estimate is based on typical conditions (V  
GLB loads on average exists. These values are for estimates only. Since the value of I  
= 3.3V, room temperature) and an assumption of two  
is sensitive to  
CC  
CC  
operating conditions and the program in the device, the actual I  
should be verified.  
CC  
0127/2096VE  
9