Kingbor Technology Co.,Ltd
TEL:(86)0755-26508846 FAX:(86)0755-26509052
KB3511
Trickle
Clamp
V
IN
SIMPLIFIED BLOC DIAGRAM
REGULATOR 1
MODE/SYNC
6
SLOPE
COMP
0.6V
+
EA
–
I
TH
0.35V
EN
SLEEP
–
I
COMP
+
5Ω
V
FB1
1
–
+
Trickle
S
Q
RS
LATCH
R
Q
SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
0.55V
–
UVDET
UV
+
ANTI
SHOOT-
THRU
4
SW1
+
OVDET
0.65V
OV
I
RCMP
PGOOD1
RUN1
RUN2
2
0.6V REF
9
OSC
PGOOD2
REGULATOR 2 (IDENTICAL TO REGULATOR 1)
V
FB2
10
OSC,2.2MHz
POR
COUNTER
OPERATION
The KB3511 uses a constant frequency, current mode
architecture. The operating frequency is set at 2.2MHz and
can be synchronized to an external oscillator. Both chan-
nels share the same clock and run in-phase. To suit a
variety of applications, the selectable Mode pin allows the
user to trade-off noise for efficiency.
The output voltage is set by an external divider returned to
the V
FB
pins. An error amplfier compares the divided
output voltage with a reference voltage of 0.6V and adjusts
the peak inductor current accordingly. Overvoltage and
undervoltage comparators will pull the POR output low if
the output voltage is not within
±8.5%.
The POR output
will go high after 262,144 clock cycles (about 120ms) of
achieving regulation.
Main Control Loop
During normal operation, the top power switch (P-channel
MOSFET) is turned on at the beginning of a clock cycle
when the V
FB
voltage is below the the reference voltage.
The current into the inductor and the load increases until
the current limit is reached. The switch turns off and
energy stored in the inductor flows through the bottom
switch (N-channel MOSFET) into the load until the next
clock cycle.
The peak inductor current is controlled by the internally
compensated I
TH
voltage, which is the output of the error
amplifier.This amplifier compares the V
FB
pin to the 0.6V
reference. When the load current increases, the V
FB
volt-
age decreases slightly below the reference. This
6
–
SHUTDOWN
+
11
GND
V
IN
3
V
IN
8
POR
5
GND
7
SW2
–