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U7238C-1FP 参数 Datasheet PDF下载

U7238C-1FP图片预览
型号: U7238C-1FP
PDF下载: 下载PDF文件 查看货源
内容描述: [MIPI D-PHY Conformance Test Software]
分类和应用:
文件页数/大小: 15 页 / 3020 K
品牌: KEYSIGHT [ Keysight Technologies ]
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11 | Keysight | U7238C and U7238D MIPI D-PHY Conformance Test Software - Data Sheet  
Measurement Requirements  
To use the D-PHY conformance software you will need a Keysight Infiniium Series oscilloscope  
with at least 4 GHz of analog, real-time bandwidth. In order to use the D-PHY conformance  
test software, your product will need to be able to source the necessary low-power (LP) to  
high-speed (HS) data transitions needed to perform the testing.  
Tests Performed  
The D-PHY conformance software performs the following tests as per MIPI Alliance  
Specification for D-PHY v1.2, section 9 and D-PHY CTS v1.2, section 1.  
MIPI D-PHY CTS section 1, TX timers and signaling  
Global operation data and clock TX measurements  
High-speed data and clock measurements  
– TLPX  
– HS data and clock TX static common-mode voltage  
(VCMTX)  
– LP exit: Data TX THS-prepare  
– LP exit: Data TX THS-prepare+THS-zero  
– HS exit: Data TX THS-trail  
– HS exit: Data TX TEOT  
– HS exit: Data TX THS-exit  
– LP exit: Clock TX THS-exit  
– LP exit: Clock TX TLPX  
– LP exit: Clock TX TCLK-prepare  
– LP exit: Clock TX TCLK-prepare+TCLK-zero  
– LP exit: Clock TX TCLK-PRE  
– LP exit: Clock TX TCLK-trail  
– LP exit: Clock TC TX TEOT  
HS data and clock TX VCMTX mismatch (ΔVCMTX(1,0)  
– HS data and clock TX differential voltage (VOD)  
HS data and clock TX differential voltage mismatch (ΔVOD)  
– HS data and clock TX single-ended output high voltage  
(VOHHS)  
– HS data and clock TX common-level variations above 450  
MHz (VCMTX(HF))  
– HS data and clock TX common-level variations between  
50-450 MHz (VCMTX(LF))  
– HS data and clock TX 20%-80% rise time (tR)  
– HS data and clock TX 20%-80% fall time (tF)  
– HS clock instantaneous (UI INST)  
HS data-clock timing  
Low-power data measurements  
– HS clock instantaneous  
– HS clock rising edge alignment to first payload bit  
– Data-to-clock skew (TSKEW(TX))  
– LP TX Thevenin output high voltage level (VOH)  
– LP TX Thevenin output low voltage (VOL)  
– LP TX 15 to 85% rise time (tRLP)  
– LP TX 15 to 85% fall time (tFLP)  
– LP TX 30 to 85% post-EoT rise time (tREOT)  
– LP TX pulse width of LP TX exclusive-OR clock  
(TLP-PULSE-TX)  
– LP TX period of LP TX exclusive-OR clock (TLP-PER-TX)  
– LP TX slew rate vs. CLOAD  
Table 1. MIPI D-PHY electrical conformance tests performed by the software.  
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