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U4164AU-200 参数 Datasheet PDF下载

U4164AU-200图片预览
型号: U4164AU-200
PDF下载: 下载PDF文件 查看货源
内容描述: [Logic Analyzer Module]
分类和应用:
文件页数/大小: 34 页 / 1843 K
品牌: KEYSIGHT [ Keysight Technologies ]
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03 | Keysight | U4164A Logic Analyzer Module - Data Sheet  
Product Description  
The Keysight Technologies, Inc. U4164A logic analyzer system combines reliable data capture  
with powerful analysis and validation tools to enable you to quickly and confidently validate and  
debug high-speed digital designs operating at speeds up to 4 Gb/s. The U4164A logic analyzer  
module delivers the following unique capabilities that enable you to make measurements and  
achieve levels of insight unavailable with other logic analyzers:  
– Quad sample state mode provides four samples with two different threshold settings from  
a single-touch connection to high-speed data signals under test 1  
– Dual sample, dual threshold state mode  
Clock hysteresis allows the user to define a hysteresis range about the clock threshold  
– 10 GHz ¼ channel conventional and transitional timing mode 2  
– Software tool for timing de-skew  
– 400 Mb (sample) memory depth option  
– Four speed options corresponding to the state clock rate, data rate, and timing mode  
sample rates  
Applications  
– Functional validation of memory systems and other high-speed digital systems operating  
up to 4 Gb/s  
– Debug of hardware and software in high-speed digital systems operating up to 4 Gb/s  
– Qualitative bus level signal integrity insight using eye scan or DDR eye scan  
Features  
– State capture up to 4 Gb/s on 68 channels, 2.5 Gb/s on 136 channels per module  
– Reliable data capture on eye openings as small as 100 ps by 100 mV  
– 12.5 GHz timing zoom with 256 K sample memory  
– Memory depth up to 400 M samples  
Wide variety of probing solutions including BGA, interposer, mid-bus, and flying leads  
– Up to 10,880 channels in a system using Multiframe  
User values  
Confidence in state measurements with signal eye openings as small as 100 ps by 100 mV  
– Rapidly view signal integrity information in a matter of minutes on all the buses in your  
design under a wide variety of operating conditions  
– Quickly and easily set up complex DDR and LPDDR measurements  
– 350 MHz, 700 MHz, 1.4 GHz, and 2.5 GHz state speed options: Purchase the level of state  
speed capture capability you need now and upgrade as your state speed needs increase.  
The U4164A with the 2.5 GHz state speed option allows you to capture the highest speeds  
(up to 4 Gb/s) for DDR/LPDDR memory systems  
– Dual-sample state mode: set separate sample positions and thresholds for DDR/LPDDR  
read/write captures for data rates less than 2500 Mb/s from one probe point  
– Quad-sample state mode: set separate sample positions and thresholds for DDR/LPDDR  
read/write and rising/falling edge captures for data rates greater than 2500 Mb/s from one  
probe point  
– Clock hysteresis: avoid false sampling on noisy clock inputs when differential clocks turn  
off  
– 10 GHz quarter channel conventional and transitional timing mode: Identify timing  
problems in deep traces with high sample resolution  
– 400 Mb (sample) memory depth option: Capture more system activity so you can debug  
complex problems when the symptom and root cause are widely separated in time  
1. Available in Option -02G  
2. Available in Options -01G and -02G