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N5462A-1FP 参数 Datasheet PDF下载

N5462A-1FP图片预览
型号: N5462A-1FP
PDF下载: 下载PDF文件 查看货源
内容描述: [Infiniium V-Series Oscilloscopes]
分类和应用:
文件页数/大小: 47 页 / 11644 K
品牌: KEYSIGHT [ Keysight Technologies ]
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11 | Keysight | Infiniium V-Series Oscilloscopes - Data Sheet  
Industry’s Leading Hardware Serial Trigger  
Challenges identifying and debugging high-speed  
serial buses  
In today’s high-speed serial application debug, it is not  
always easy to find errors that happen rarely or occasionally�  
Conventional oscilloscopes usually have limitations because of  
the long dead time between acquisitions, which cause infrequent  
errors or events to be missed� Furthermore, it is becoming more  
difficult to identify and debug the root cause of design problems,  
whether it is physical or protocol layer related�  
Industry’s longest 160-bit sequence and sixteen-  
8b/10b symbols hardware serial trigger  
The Infiniium V-Series’ 12�5 Gb/s hardware serial trigger with  
the industry’s longest 160-bit sequence provides an effective  
event trigger to find and debug the most challenging problems  
in your design� You can specify to trigger on bit 1 (high), 0 (low)  
and X (don’t care) conditions when searching for a specific event�  
The 160-bit sequence length is critical to trigger at the longest  
symbol in an application such as USB 3�1 and PCI Express® Gen  
3 symbols that are 132-bit and 130-bit long� If the trigger bit  
sequence is insufficient, you will not be able to reliably trigger on  
an event you want to identify, making the debug process more  
challenging�  
V-Series’ hardware serial trigger finds a PCI Express Gen 3 compliance  
ordered set symbol that is 130-bit long (PCIe Gen 3 uses 128b/130b  
encoding)�  
The hardware serial trigger also provides 8b/10b triggering  
of up to 16 symbols of “K” and “D” codes� Since the 8b/10b  
symbols can be transmitted with either disparity to maintain the  
DC-balanced on the line, the hardware serial trigger is designed  
to trigger on both disparities so you do not miss an event� In  
additional, the V-Series can decode the data packet at the  
application level such as PCIe Gen 3, USB 3�0 and SATA packets,  
providing deeper protocol insight into the application� When  
there is an error, you can now go in and debug the issue whether  
it is related to the physical layer, where the signal integrity  
is corrupted, or protocol layer, where the data is incorrectly  
transmitted�  
The V-Series’ 8b/10b hardware triggers at 16 “K” and “D” symbols of the  
SATA signal� The software protocol decoder further decodes the symbols  
into higher-level data packets such as the SATA ALIGN packets�  
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