21 | Keysight | N4960A Serial BERT 17 and 32 Gb/s - Data Sheet
N4951A/N4951B7 pattern generator remote head specifications
Configuration
Remote mountable head operates with N4960-CJ0 / N4960A-CJ1.
Data rate range N4951A-P32/N4951B-H32 / 5 to 32 Gb/s
N4951B-D32
Data rate range N4951A-P17/N4951B-H17 / 4 to 17 Gb/s
N4951B-D17
Data rate resolution
Pattern selection
PRBS (hardware generated)
Telecom/datacom
Clock
2 kb/s
2n – 1, n = 7, 9, 10, 11, 15, 23, 29, 31, 33, 35, 39, 41, 45, 47, 49, 51
K28.3, K28.5, K28.7, CJPAT, CJTPAT, CRPAT, JSPAT, JTSPAT
÷ 2, ÷ 4, ÷ 8, ..., ÷ 64, ÷ 2 = 0101, ÷ 4 = 0011, ..., ÷ 64 = 32 0’s followed by 32 1’s
User
1 bit to 8 Mb
Pattern invert
Available for all patterns
Error injection
Error injection rates
Output configuration
Single or uniform rate
10-n, n = 3, 4, 5, 6, 7, 8, 9
Differential. May be operated single-ended without unused output terminated into 50 Ω. AC Coupled with
internal bias tee
Output data connectors
N4951A
N4951B
2.92 mm female
2.4 mm female
Output data amplitude
N4951A
100 mV (p-p) to 1.0 V (p-p), single-ended, in 5 mV steps
300 mV (p-p) to 3.0 V (p-p), single-ended, in 5 mV steps
300 mV (p-p) to 1.5 V (p-p), single-ended, in 5 mV steps
Adjustable 35 to 65%
–2 V to +2 V. Offset range limited by termination voltage
–2 V to +2 V. Termination voltage limited by offset voltage
0 to ±2,000 UI6, in 2 mUI steps
N4951B-H17/N4951B-H32
N4951B-D17/D32
Output data crossing point
Offset voltage range
Termination voltage range
Output data delay range
Rise time (20% to 80%)
N4951A-P17
N4951A-P32
N4951B-H17
N4951B-H32
N4951B-D17
N4951B-D32
Jitter6
N4951A
N4951B-H17
N4951B-H32
N4951B-D17
N4951B-D32
17 ps typical, 20 ps maximum1, 3
16 ps typical, 20 ps maximum2, 3
12 ps typical, 15 ps maximum1, 4
12 ps typical. 15 ps maximum2, 4
16 ps typical, 20 ps maximum1
15 ps typical, 19 ps maximum2
1.3 ps rms typical5
< 750 fs typical1, 4, 5
< 650 fs typical2, 4, 5
< 600 fs typical1,5
< 650 fs typical2,5
De-emphasis configuration
N4951B-D17
N4951B-D32 only
5-tap: pre-cursor, post-cursor 1, post-cursor 2, post-cursor 3
Pre-cursor
0 to +30 dB8
Post-cursor 1
Post-cursor 2
Post-cursor 3
0 to –30 dB8
–30 to +30 dB8
–30 to +30 dB8
1. At 14 Gb/s
2. At 28 Gb/s
3. At 1 V (p-p) amplitude, single-ended
4. At >= 1 V (p-p) amplitude, single-ended
5. Jitter rms is measured on an eye diagram from 86100 DCA with 70 GHz remote heads and precision time base, N4960A driven with an external clock e.g.
Keysight E8257D
6. Data Delay spec applies only to a pattern generator connected to the Delay port.
7. N4951B pattern generator heads are only supported on Keysight N4960A controllers with serial numbers higher than US53083001, otherwise an N4960A
controller upgrade is required.
8. Cursor amplitudes are specified relative to the preceding cursor e.g. post-cursor 1 amplitude is relative to the main cursor amplitude; post-cursor 2
amplitude is relative to post-cursor 1; post-cursor 3 amplitude is relative to post-cursor 2; pre-cursor amplitude is relative to post-cursor 3.
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