10 | Keysight | M9203A PXIe High-Speed Digitizer/Wideband Digital Receiver - Data Sheet
Technical Specifications and Characteristics (continued)
Trigger
Trigger modes
Positive or negative edge
External, Software, Channel
DC to 250 MHz
Trigger sources
Channel trigger frequency range
External trigger (TRG IN SMB connector)
Coupling
DC
Impedance
50 Ω (nominal)
Level range
± 5 V (nominal)
Minimum amplitude
0.5 V pk-pk
Frequency range
DC to 2 GHz (nominal)
32 days
Maximum time stamp duration
Trigger time interpolator resolution4
Trigger time interpolator precision4
Rearm time (deadtime)
Trigger out (TRG OUT SMB connector)1
-SR2
6.25 ps (nominal)
15 ps RMS (nominal)
500 ns (nominal)
-SR2
1 (programmable), 50 Ω source
0.8 Vpp ±2.5 Voffset (nominal) into high impedance
Signal level
Control IO (I/O 1 and 2 MMCX connectors)2
Output functions
Acquisition active
Trigger is armed
Trigger accept resynchronization
100 MHz reference clock divided by 23
Sampling clock divided by 323
Low level
High level
FPGA synchronization
Input/output function
FPGA programmable I/O
1. At 10 MHz on a 50 Ω load.
2. I/0 3 reserved for future use.
3. Only on I/O 1.
4. At maximum sample rate or at decimated sampling rate down to 1/16 of the highest sample rate (1/32 of the highest sample rate with interleaving).
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